Did some more checking.

The compiler handles both isr's by chaining them, first receive, then transmit.
The start for the isr:

                               org      4
                               movwf    v__pic_isr_w
                               swapf    v__status,w
                               clrf     v__status
                               movwf    v__pic_isr_status
                               movf     v__pclath,w
                               movwf    v__pic_isr_pclath
                               clrf     v__pclath
                               branchhi_clr l__serial_receive_interrupt_handler
                               branchlo_clr l__serial_receive_interrupt_handler
                               goto     l__serial_receive_interrupt_handler


And after the end of l__serial_transmit_interrupt_handler:
;  188 end procedure
                               movf     v__pic_isr_pclath,w
                               movwf    v__pclath
                               swapf    v__pic_isr_status,w
                               movwf    v__status
                               swapf    v__pic_isr_w,f
                               swapf    v__pic_isr_w,w
                               retfie


So registers are saved in one place and restored in one other place.
If the compiler uses fsr (as it does with arrays), it should be saved
too IMHO. I'll send a message to Kyle and ask his opinion.

Joep

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