Status: Assigned Owner: robhamerling Labels: Type-Enhancement Priority-Medium Component-Scripts
New issue 97 by robhamerling: Missing declarations of 'memory shared' SFRs of the 18Fs http://code.google.com/p/jallib/issues/detail?id=97 Some newer 18Fs have Special Function Registers which share their addresses with other SFRs. An 'ADSHR' bit in the WDTCON determines which of both registers will be accessed. There are some issues with this type of registers: 1. To be able to access these registers like 'normal' (memory mapped) registers the pseudo variable feature of Jal V2 can be used. For writing ('put procedure) no problem, but with reading ('get function) the compiler chokes (probably caused reading the register in the read 'get function). 2. The subfields (if any) of these registers must be accessable like 'normal' bit fields too. The device files will have to be extended to provide the required functionality. -- You received this message because you are listed in the owner or CC fields of this issue, or because you starred this issue. You may adjust your issue notification preferences at: http://code.google.com/hosting/settings --~--~---------~--~----~------------~-------~--~----~ You received this message because you are subscribed to the Google Groups "jallib" group. To post to this group, send email to [email protected] To unsubscribe from this group, send email to [email protected] For more options, visit this group at http://groups.google.com/group/jallib?hl=en -~----------~----~----~----~------~----~------~--~---
