Matt/Joep 
A result!! 

Changed the CLK resistor network to 1k/2.2k  (didn’t have 2k don’t ask why)

Assuming PIC output level of 5V, divider would give 3.44V (ish) which was 
within  23k256  spec of  Vcc (3.3V )  + 0.3V max. input. 

Obtained perfect results no problems reading/writing large byte values. - 
yippee!!

Showed that 23k256 had not appeared to have suffered any damage from my 
fumbling.

Think I will stop there and call a halt on the 74HTC08 alternative method 
for now.

 Looks as though comment by Joep "larger current faster signals" did the 
trick.

Where would one look on the 23k256 data sheet to assess the clock current 
sensitivity?

If you find out why will you let me know? 

Thanks for help with this

Kind Regards

Dave

 

 

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