Hi Pavel,

Timer0_isr_interval is not 100% accurate. When the timer expires, an
interrupt is generated. From that, it takes a few instructions to reload
the timer and start the next interval. As a result, the actual interval is
slightly longer than specified. So (apart from any clock inaccuracy), you
need to compensate a few hundred nanoseconds to a few microseconds each
interval if you want long term stability. You could keep accumulate the
required compensation in a variable and add an interval when this variable
reaches 1ms.

rtc_isr_tmr0 keeps the timer continuously running, so the ISR rate will be
as accurate as the clock. However, this gives an ISR rate that depends on
the clock frequency and timer size. E.g. a 20 MHz clock and an 8 bit timer
gives 20 MHz / 4/ 256 = 19531.25 Hz ISR rate. The  Bresenham algorithm is
used to translate this to a one second interval. And indeed, this algorithm
gives jitter, but this jitter should be limited to 51 microseconds
(1/19531Hz) .

Note that above is partly an assumption based on my knowledge of the
algorithm. The library is in assembler, which is not not my expertise.


Regards,
Joep


2014-07-22 23:24 GMT+02:00 Pavel Milanes Costa <[email protected]>:

> Hi to all...
>
> I'm building a 7 Segment desk clock as a hobby project, and I ran across
> two methods to get the 1 second increments...
>
> - timer0_isr_interval
>         Setting a 1Khz rate and a slot with tick to make one second
>
> - rtc_isr_tmr0
>         A "more accurate solution" over time...
>
> There is any pros and cons about one method or the other?
>
> I read that rtc_isr_tmr0 is more accurate over time with jitter on the
> seconds count... but,
>
> This is realy true? any reason to use timer0_isr_interval over this?
>
> cheers
>
> Pavel.
>
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