Hi Vasili,
On 01/10/2021 13.11, vsurducan wrote:
Hi Rob and Rob, :)
I've tried with or without ISR, with AND IOCAP reset or normal IOCAP
reset. This IOC is erratic and has a lot of latency. The RDY_IN signal
is 20ms square 50% duty cycle, the RDY_OUT signal has a latency most
of the time...but sometimes has a 20mS pulse as it should. The code
which somehow "works" is below, however the need of clearing the
IOCAF0 in the main loop is weird. Without it IOC is not working. If
the RDY_IN (pin_A0) signal disappears, the RDY_OUT (pin_A5) remains high.
INTCON_IOCIF is read only, it's content is changed by IOCAF. To clear
INTCON_IOCIF the whole IOCAF register has to be cleared.
Perhaps I missed something...
It could be as well be me who is missing something....
If the only purpose of your program is to have pin_RDY-OUT following
pin_RDY_IN then forget IOC and simply use:
forever loop
pin_RDY_OUT = pin_RDY_IN
end loop
But I suppose you showed us only a part of your program/functionality.
BTW You don't need assembler to clear the interrupt flag of pin_RDY_IN.
I used successfully:
IOCAF = IOCAF & 0xFE
(check the assembler output of the compiler).
--
*Rob H*amerling, Vianen, NL
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