My name is Udara De Silva and I am a Ph.D student from University of Akron.
I got familiar with Jenkins while working on my project
https://chiphackers.com/ I am really looking forward to work on a Jenkins
project for this year GSOC. In particular, I am interested in extending
Jenkins capabilities in Electronic Design Automation and Verification.
My familiar programming languages are JAVA, C++, Python and Matlab. Related
to the project, I am familiar with Verilog and VHDL. I have also good
experience in EDA tools like Design Compiler, PrimTime, SpyGlass, VCS and
Model Sim. I have worked as an R&D Engineer at Synopsys before starting my
Ph.D. I have participated in GSOC 2015 where I have completed a project
mentored by MyHDL open source EDA module for Python. All my project results
can be found on my blog http://design4hardware.blogspot.com/
Below are couple of my online profiles:
Linked In : https://www.linkedin.com/in/udara28/
GitHub : https://github.com/udara28
About the project: Continuous integration in electronic design (specially
in IP) is a real challenge. Jenkins strengths in Software CI can be used to
address this challenge. An EDA plugin will be able to post results on unit
tests, coverage (support from simulators need to be studied) and publish
health status of IPs to public.
Udara De Silva
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