CC: [email protected] CC: [email protected] TO: Alex Sierra <[email protected]> CC: Alex Deucher <[email protected]> CC: Felix Kuehling <[email protected]>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 15bc20c6af4ceee97a1f90b43c0e386643c071b4 commit: ab518012062d9a7adbdea189ecffb53133c2bb42 drm/amdgpu: enable IH ring 1 and ring 2 for navi date: 5 months ago :::::: branch date: 26 hours ago :::::: commit date: 5 months ago config: ia64-randconfig-m031-20200827 (attached as .config) compiler: ia64-linux-gcc (GCC) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> Reported-by: Dan Carpenter <[email protected]> smatch warnings: drivers/gpu/drm/amd/amdgpu/navi10_ih.c:319 navi10_ih_get_wptr() error: uninitialized symbol 'reg'. # https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=ab518012062d9a7adbdea189ecffb53133c2bb42 git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout ab518012062d9a7adbdea189ecffb53133c2bb42 vim +/reg +319 drivers/gpu/drm/amd/amdgpu/navi10_ih.c edc611475a8adbd Hawking Zhang 2019-03-03 289 edc611475a8adbd Hawking Zhang 2019-03-03 290 /** edc611475a8adbd Hawking Zhang 2019-03-03 291 * navi10_ih_get_wptr - get the IH ring buffer wptr edc611475a8adbd Hawking Zhang 2019-03-03 292 * edc611475a8adbd Hawking Zhang 2019-03-03 293 * @adev: amdgpu_device pointer edc611475a8adbd Hawking Zhang 2019-03-03 294 * edc611475a8adbd Hawking Zhang 2019-03-03 295 * Get the IH ring buffer wptr from either the register edc611475a8adbd Hawking Zhang 2019-03-03 296 * or the writeback memory buffer (NAVI10). Also check for edc611475a8adbd Hawking Zhang 2019-03-03 297 * ring buffer overflow and deal with it. edc611475a8adbd Hawking Zhang 2019-03-03 298 * Returns the value of the wptr. edc611475a8adbd Hawking Zhang 2019-03-03 299 */ edc611475a8adbd Hawking Zhang 2019-03-03 300 static u32 navi10_ih_get_wptr(struct amdgpu_device *adev, edc611475a8adbd Hawking Zhang 2019-03-03 301 struct amdgpu_ih_ring *ih) edc611475a8adbd Hawking Zhang 2019-03-03 302 { edc611475a8adbd Hawking Zhang 2019-03-03 303 u32 wptr, reg, tmp; edc611475a8adbd Hawking Zhang 2019-03-03 304 edc611475a8adbd Hawking Zhang 2019-03-03 305 wptr = le32_to_cpu(*ih->wptr_cpu); edc611475a8adbd Hawking Zhang 2019-03-03 306 edc611475a8adbd Hawking Zhang 2019-03-03 307 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) edc611475a8adbd Hawking Zhang 2019-03-03 308 goto out; edc611475a8adbd Hawking Zhang 2019-03-03 309 ab518012062d9a7 Alex Sierra 2020-03-23 310 if (ih == &adev->irq.ih) edc611475a8adbd Hawking Zhang 2019-03-03 311 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); ab518012062d9a7 Alex Sierra 2020-03-23 312 else if (ih == &adev->irq.ih1) ab518012062d9a7 Alex Sierra 2020-03-23 313 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING1); ab518012062d9a7 Alex Sierra 2020-03-23 314 else if (ih == &adev->irq.ih2) ab518012062d9a7 Alex Sierra 2020-03-23 315 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR_RING2); ab518012062d9a7 Alex Sierra 2020-03-23 316 else ab518012062d9a7 Alex Sierra 2020-03-23 317 BUG(); ab518012062d9a7 Alex Sierra 2020-03-23 318 edc611475a8adbd Hawking Zhang 2019-03-03 @319 wptr = RREG32_NO_KIQ(reg); edc611475a8adbd Hawking Zhang 2019-03-03 320 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) edc611475a8adbd Hawking Zhang 2019-03-03 321 goto out; edc611475a8adbd Hawking Zhang 2019-03-03 322 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); edc611475a8adbd Hawking Zhang 2019-03-03 323 edc611475a8adbd Hawking Zhang 2019-03-03 324 /* When a ring buffer overflow happen start parsing interrupt edc611475a8adbd Hawking Zhang 2019-03-03 325 * from the last not overwritten vector (wptr + 32). Hopefully edc611475a8adbd Hawking Zhang 2019-03-03 326 * this should allow us to catch up. edc611475a8adbd Hawking Zhang 2019-03-03 327 */ edc611475a8adbd Hawking Zhang 2019-03-03 328 tmp = (wptr + 32) & ih->ptr_mask; edc611475a8adbd Hawking Zhang 2019-03-03 329 dev_warn(adev->dev, "IH ring buffer overflow " edc611475a8adbd Hawking Zhang 2019-03-03 330 "(0x%08X, 0x%08X, 0x%08X)\n", edc611475a8adbd Hawking Zhang 2019-03-03 331 wptr, ih->rptr, tmp); edc611475a8adbd Hawking Zhang 2019-03-03 332 ih->rptr = tmp; edc611475a8adbd Hawking Zhang 2019-03-03 333 ab518012062d9a7 Alex Sierra 2020-03-23 334 if (ih == &adev->irq.ih) edc611475a8adbd Hawking Zhang 2019-03-03 335 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL); ab518012062d9a7 Alex Sierra 2020-03-23 336 else if (ih == &adev->irq.ih1) ab518012062d9a7 Alex Sierra 2020-03-23 337 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING1); ab518012062d9a7 Alex Sierra 2020-03-23 338 else if (ih == &adev->irq.ih2) ab518012062d9a7 Alex Sierra 2020-03-23 339 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING2); ab518012062d9a7 Alex Sierra 2020-03-23 340 else ab518012062d9a7 Alex Sierra 2020-03-23 341 BUG(); ab518012062d9a7 Alex Sierra 2020-03-23 342 edc611475a8adbd Hawking Zhang 2019-03-03 343 tmp = RREG32_NO_KIQ(reg); edc611475a8adbd Hawking Zhang 2019-03-03 344 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); edc611475a8adbd Hawking Zhang 2019-03-03 345 WREG32_NO_KIQ(reg, tmp); edc611475a8adbd Hawking Zhang 2019-03-03 346 out: edc611475a8adbd Hawking Zhang 2019-03-03 347 return (wptr & ih->ptr_mask); edc611475a8adbd Hawking Zhang 2019-03-03 348 } edc611475a8adbd Hawking Zhang 2019-03-03 349 :::::: The code at line 319 was first introduced by commit :::::: edc611475a8adbdea8ce358216c5b1a9d710049c drm/amdgpu: add navi10 ih ip block (v3) :::::: TO: Hawking Zhang <[email protected]> :::::: CC: Alex Deucher <[email protected]> --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
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