CC: [email protected]
In-Reply-To: <[email protected]>
References: <[email protected]>
TO: Dale B Stimson <[email protected]>
TO: [email protected]

Hi Dale,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip next-20210414]
[cannot apply to v5.12-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    
https://github.com/0day-ci/linux/commits/Dale-B-Stimson/drm-i915-dg1-Add-HWMON-power-sensor-support/20210414-052742
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
:::::: branch date: 23 hours ago
:::::: commit date: 23 hours ago
config: x86_64-randconfig-m001-20210414 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <[email protected]>
Reported-by: Dan Carpenter <[email protected]>

smatch warnings:
drivers/gpu/drm/i915/i915_hwmon.c:176 i915_energy1_input_show() error: 
uninitialized symbol 'reg_value'.
drivers/gpu/drm/i915/i915_hwmon.c:198 i915_energy1_input_show() warn: should '1 
<< (nshift - 1)' be a 64 bit type?
drivers/gpu/drm/i915/i915_hwmon.c:240 i915_power1_max_enable_show() error: 
uninitialized symbol 'reg_value'.
drivers/gpu/drm/i915/i915_hwmon.c:64 _field_read_and_scale() error: 
uninitialized symbol 'reg_value'.
drivers/gpu/drm/i915/i915_hwmon.c:332 i915_power1_cap_enable_show() error: 
uninitialized symbol 'reg_value'.
drivers/gpu/drm/i915/i915_hwmon.c:88 _field_read64_and_scale() error: 
uninitialized symbol 'reg_value'.

vim +/reg_value +176 drivers/gpu/drm/i915/i915_hwmon.c

22ab3625cabc29 Dale B Stimson 2021-04-13   47  
22ab3625cabc29 Dale B Stimson 2021-04-13   48  /*
22ab3625cabc29 Dale B Stimson 2021-04-13   49   * _field_read_and_scale()
22ab3625cabc29 Dale B Stimson 2021-04-13   50   * Return type of u64 allows for 
the case where the scaling might cause a
22ab3625cabc29 Dale B Stimson 2021-04-13   51   * result exceeding 32 bits.
22ab3625cabc29 Dale B Stimson 2021-04-13   52   */
22ab3625cabc29 Dale B Stimson 2021-04-13   53  static __always_inline u64
22ab3625cabc29 Dale B Stimson 2021-04-13   54  _field_read_and_scale(struct 
intel_uncore *uncore, i915_reg_t rgadr,
22ab3625cabc29 Dale B Stimson 2021-04-13   55                 u32 field_msk, 
int nshift, unsigned int scale_factor)
22ab3625cabc29 Dale B Stimson 2021-04-13   56  {
22ab3625cabc29 Dale B Stimson 2021-04-13   57   intel_wakeref_t wakeref;
22ab3625cabc29 Dale B Stimson 2021-04-13   58   u32 reg_value;
22ab3625cabc29 Dale B Stimson 2021-04-13   59   u64 scaled_val;
22ab3625cabc29 Dale B Stimson 2021-04-13   60  
22ab3625cabc29 Dale B Stimson 2021-04-13   61   
with_intel_runtime_pm(uncore->rpm, wakeref)
22ab3625cabc29 Dale B Stimson 2021-04-13   62           reg_value = 
intel_uncore_read(uncore, rgadr);
22ab3625cabc29 Dale B Stimson 2021-04-13   63  
22ab3625cabc29 Dale B Stimson 2021-04-13  @64   reg_value = 
le32_get_bits(cpu_to_le32(reg_value), field_msk);
22ab3625cabc29 Dale B Stimson 2021-04-13   65   scaled_val = 
mul_u32_u32(scale_factor, reg_value);
22ab3625cabc29 Dale B Stimson 2021-04-13   66  
22ab3625cabc29 Dale B Stimson 2021-04-13   67   /* Shift, rounding to nearest */
22ab3625cabc29 Dale B Stimson 2021-04-13   68   if (nshift > 0)
22ab3625cabc29 Dale B Stimson 2021-04-13   69           scaled_val = 
(scaled_val + (1 << (nshift - 1))) >> nshift;
22ab3625cabc29 Dale B Stimson 2021-04-13   70  
22ab3625cabc29 Dale B Stimson 2021-04-13   71   return scaled_val;
22ab3625cabc29 Dale B Stimson 2021-04-13   72  }
22ab3625cabc29 Dale B Stimson 2021-04-13   73  
22ab3625cabc29 Dale B Stimson 2021-04-13   74  /*
22ab3625cabc29 Dale B Stimson 2021-04-13   75   * _field_read64_and_scale() - 
read a 64-bit register and scale.
22ab3625cabc29 Dale B Stimson 2021-04-13   76   */
22ab3625cabc29 Dale B Stimson 2021-04-13   77  static __always_inline u64
22ab3625cabc29 Dale B Stimson 2021-04-13   78  _field_read64_and_scale(struct 
intel_uncore *uncore, i915_reg_t rgadr,
22ab3625cabc29 Dale B Stimson 2021-04-13   79                   u64 field_msk, 
int nshift, unsigned int scale_factor)
22ab3625cabc29 Dale B Stimson 2021-04-13   80  {
22ab3625cabc29 Dale B Stimson 2021-04-13   81   intel_wakeref_t wakeref;
22ab3625cabc29 Dale B Stimson 2021-04-13   82   u64 reg_value;
22ab3625cabc29 Dale B Stimson 2021-04-13   83   u64 scaled_val;
22ab3625cabc29 Dale B Stimson 2021-04-13   84  
22ab3625cabc29 Dale B Stimson 2021-04-13   85   
with_intel_runtime_pm(uncore->rpm, wakeref)
22ab3625cabc29 Dale B Stimson 2021-04-13   86           reg_value = 
intel_uncore_read64(uncore, rgadr);
22ab3625cabc29 Dale B Stimson 2021-04-13   87  
22ab3625cabc29 Dale B Stimson 2021-04-13  @88   reg_value = 
le64_get_bits(cpu_to_le64(reg_value), field_msk);
22ab3625cabc29 Dale B Stimson 2021-04-13   89   scaled_val = scale_factor * 
reg_value;
22ab3625cabc29 Dale B Stimson 2021-04-13   90  
22ab3625cabc29 Dale B Stimson 2021-04-13   91   /* Shift, rounding to nearest */
22ab3625cabc29 Dale B Stimson 2021-04-13   92   if (nshift > 0)
22ab3625cabc29 Dale B Stimson 2021-04-13   93           scaled_val = 
(scaled_val + (1 << (nshift - 1))) >> nshift;
22ab3625cabc29 Dale B Stimson 2021-04-13   94  
22ab3625cabc29 Dale B Stimson 2021-04-13   95   return scaled_val;
22ab3625cabc29 Dale B Stimson 2021-04-13   96  }
22ab3625cabc29 Dale B Stimson 2021-04-13   97  
22ab3625cabc29 Dale B Stimson 2021-04-13   98  /*
22ab3625cabc29 Dale B Stimson 2021-04-13   99   * _field_scale_and_write()
22ab3625cabc29 Dale B Stimson 2021-04-13  100   */
22ab3625cabc29 Dale B Stimson 2021-04-13  101  static __always_inline void
22ab3625cabc29 Dale B Stimson 2021-04-13  102  _field_scale_and_write(struct 
intel_uncore *uncore,
22ab3625cabc29 Dale B Stimson 2021-04-13  103                  i915_reg_t rgadr,
22ab3625cabc29 Dale B Stimson 2021-04-13  104                  u32 field_msk, 
int nshift,
22ab3625cabc29 Dale B Stimson 2021-04-13  105                  unsigned int 
scale_factor, long lval)
22ab3625cabc29 Dale B Stimson 2021-04-13  106  {
22ab3625cabc29 Dale B Stimson 2021-04-13  107   u32 nval;
22ab3625cabc29 Dale B Stimson 2021-04-13  108   u32 bits_to_clear;
22ab3625cabc29 Dale B Stimson 2021-04-13  109   u32 bits_to_set;
22ab3625cabc29 Dale B Stimson 2021-04-13  110  
22ab3625cabc29 Dale B Stimson 2021-04-13  111   /* Computation in 64-bits to 
avoid overflow. Round to nearest. */
22ab3625cabc29 Dale B Stimson 2021-04-13  112   nval = 
DIV_ROUND_CLOSEST_ULL((u64)lval << nshift, scale_factor);
22ab3625cabc29 Dale B Stimson 2021-04-13  113  
22ab3625cabc29 Dale B Stimson 2021-04-13  114   bits_to_clear = field_msk;
22ab3625cabc29 Dale B Stimson 2021-04-13  115   bits_to_set = 
le32_to_cpu(le32_encode_bits(nval, field_msk));
22ab3625cabc29 Dale B Stimson 2021-04-13  116  
22ab3625cabc29 Dale B Stimson 2021-04-13  117   
_locked_with_pm_intel_uncore_rmw(uncore, rgadr,
22ab3625cabc29 Dale B Stimson 2021-04-13  118                                   
 bits_to_clear, bits_to_set);
22ab3625cabc29 Dale B Stimson 2021-04-13  119  }
22ab3625cabc29 Dale B Stimson 2021-04-13  120  
22ab3625cabc29 Dale B Stimson 2021-04-13  121  /*
22ab3625cabc29 Dale B Stimson 2021-04-13  122   * i915_energy1_input_show - A 
custom function to obtain energy1_input.
22ab3625cabc29 Dale B Stimson 2021-04-13  123   * Use a custom function instead 
of the usual hwmon helpers in order to
22ab3625cabc29 Dale B Stimson 2021-04-13  124   * guarantee 64-bits of result 
to user-space.
22ab3625cabc29 Dale B Stimson 2021-04-13  125   * Units are microjoules.
22ab3625cabc29 Dale B Stimson 2021-04-13  126   *
22ab3625cabc29 Dale B Stimson 2021-04-13  127   * The underlying hardware 
register is 32-bits and is subject to overflow.
22ab3625cabc29 Dale B Stimson 2021-04-13  128   * This function compensates for 
overflow of the 32-bit register by detecting
22ab3625cabc29 Dale B Stimson 2021-04-13  129   * wrap-around and incrementing 
an overflow counter.
22ab3625cabc29 Dale B Stimson 2021-04-13  130   * This only works if the 
register is sampled often enough to avoid
22ab3625cabc29 Dale B Stimson 2021-04-13  131   * missing an instance of 
overflow - achieved either by repeated
22ab3625cabc29 Dale B Stimson 2021-04-13  132   * queries through the API, or 
via a possible timer (future - TBD) that
22ab3625cabc29 Dale B Stimson 2021-04-13  133   * ensures values are read often 
enough to catch all overflows.
22ab3625cabc29 Dale B Stimson 2021-04-13  134   *
22ab3625cabc29 Dale B Stimson 2021-04-13  135   * How long before overflow?  
For example, with an example scaling bit
22ab3625cabc29 Dale B Stimson 2021-04-13  136   * shift of 14 bits (see 
register *PACKAGE_POWER_SKU_UNIT) and a power draw of
22ab3625cabc29 Dale B Stimson 2021-04-13  137   * 1000 watts, the 32-bit 
counter will overflow in approximately 4.36 minutes.
22ab3625cabc29 Dale B Stimson 2021-04-13  138   *
22ab3625cabc29 Dale B Stimson 2021-04-13  139   * Examples:
22ab3625cabc29 Dale B Stimson 2021-04-13  140   *    1 watt:  (2^32 >> 14) /    
1 W / (60 * 60 * 24) secs/day -> 3 days
22ab3625cabc29 Dale B Stimson 2021-04-13  141   * 1000 watts: (2^32 >> 14) / 
1000 W / 60             secs/min -> 4.36 minutes
22ab3625cabc29 Dale B Stimson 2021-04-13  142   */
22ab3625cabc29 Dale B Stimson 2021-04-13  143  static ssize_t
22ab3625cabc29 Dale B Stimson 2021-04-13  144  i915_energy1_input_show(struct 
device *dev, struct device_attribute *attr,
22ab3625cabc29 Dale B Stimson 2021-04-13  145                   char *buf)
22ab3625cabc29 Dale B Stimson 2021-04-13  146  {
22ab3625cabc29 Dale B Stimson 2021-04-13  147   struct drm_i915_private *i915 = 
dev_get_drvdata(dev);
22ab3625cabc29 Dale B Stimson 2021-04-13  148   struct intel_uncore *uncore = 
&i915->uncore;
22ab3625cabc29 Dale B Stimson 2021-04-13  149   struct i915_hwmon *hwmon = 
&i915->hwmon;
22ab3625cabc29 Dale B Stimson 2021-04-13  150   int nshift = 
hwmon->scl_shift_energy;
22ab3625cabc29 Dale B Stimson 2021-04-13  151   ssize_t ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  152   intel_wakeref_t wakeref;
22ab3625cabc29 Dale B Stimson 2021-04-13  153   u32 reg_value;
22ab3625cabc29 Dale B Stimson 2021-04-13  154   u64 vlo;
22ab3625cabc29 Dale B Stimson 2021-04-13  155   u64 vhi;
22ab3625cabc29 Dale B Stimson 2021-04-13  156  
22ab3625cabc29 Dale B Stimson 2021-04-13  157   mutex_lock(&hwmon->hwmon_lock);
22ab3625cabc29 Dale B Stimson 2021-04-13  158  
22ab3625cabc29 Dale B Stimson 2021-04-13  159   
with_intel_runtime_pm(uncore->rpm, wakeref)
22ab3625cabc29 Dale B Stimson 2021-04-13  160           reg_value = 
intel_uncore_read(uncore,
22ab3625cabc29 Dale B Stimson 2021-04-13  161                                   
      hwmon->rg.reg_energy_status);
22ab3625cabc29 Dale B Stimson 2021-04-13  162  
22ab3625cabc29 Dale B Stimson 2021-04-13  163   /*
22ab3625cabc29 Dale B Stimson 2021-04-13  164    * The u32 register 
concatenated with the u32 overflow counter
22ab3625cabc29 Dale B Stimson 2021-04-13  165    * gives an effective energy 
counter size of 64-bits.  However, the
22ab3625cabc29 Dale B Stimson 2021-04-13  166    * computations below are done 
modulo 2^96 to avoid overflow during
22ab3625cabc29 Dale B Stimson 2021-04-13  167    * scaling in the conversion to 
microjoules.
22ab3625cabc29 Dale B Stimson 2021-04-13  168    *
22ab3625cabc29 Dale B Stimson 2021-04-13  169    * The low-order 64-bits of the 
resulting quantity are returned to
22ab3625cabc29 Dale B Stimson 2021-04-13  170    * the caller in units of 
microjoules, encoded into a decimal string.
22ab3625cabc29 Dale B Stimson 2021-04-13  171    *
22ab3625cabc29 Dale B Stimson 2021-04-13  172    * For a power of 1000 watts, 
64 bits in units of microjoules will
22ab3625cabc29 Dale B Stimson 2021-04-13  173    * overflow after 584 years.
22ab3625cabc29 Dale B Stimson 2021-04-13  174    */
22ab3625cabc29 Dale B Stimson 2021-04-13  175  
22ab3625cabc29 Dale B Stimson 2021-04-13 @176   if (hwmon->energy_counter_prev 
> reg_value)
22ab3625cabc29 Dale B Stimson 2021-04-13  177           
hwmon->energy_counter_overflow++;
22ab3625cabc29 Dale B Stimson 2021-04-13  178  
22ab3625cabc29 Dale B Stimson 2021-04-13  179   hwmon->energy_counter_prev = 
reg_value;
22ab3625cabc29 Dale B Stimson 2021-04-13  180  
22ab3625cabc29 Dale B Stimson 2021-04-13  181   /*
22ab3625cabc29 Dale B Stimson 2021-04-13  182    * 64-bit variables vlo and vhi 
are used for the scaling process.
22ab3625cabc29 Dale B Stimson 2021-04-13  183    * The 96-bit counter value is 
composed from the two 64-bit variables
22ab3625cabc29 Dale B Stimson 2021-04-13  184    * vhi and vlo thusly:  counter 
== vhi << 32 + vlo .
22ab3625cabc29 Dale B Stimson 2021-04-13  185    * The 32-bits of overlap 
between the two variables is convenient for
22ab3625cabc29 Dale B Stimson 2021-04-13  186    * handling overflows out of 
vlo.
22ab3625cabc29 Dale B Stimson 2021-04-13  187    */
22ab3625cabc29 Dale B Stimson 2021-04-13  188  
22ab3625cabc29 Dale B Stimson 2021-04-13  189   vlo = reg_value;
22ab3625cabc29 Dale B Stimson 2021-04-13  190   vhi = 
hwmon->energy_counter_overflow;
22ab3625cabc29 Dale B Stimson 2021-04-13  191  
22ab3625cabc29 Dale B Stimson 2021-04-13  192   
mutex_unlock(&hwmon->hwmon_lock);
22ab3625cabc29 Dale B Stimson 2021-04-13  193  
22ab3625cabc29 Dale B Stimson 2021-04-13  194   vlo = SF_ENERGY * vlo;
22ab3625cabc29 Dale B Stimson 2021-04-13  195  
22ab3625cabc29 Dale B Stimson 2021-04-13  196   /* Prepare to round to nearest 
*/
22ab3625cabc29 Dale B Stimson 2021-04-13  197   if (nshift > 0)
22ab3625cabc29 Dale B Stimson 2021-04-13 @198           vlo += 1 << (nshift - 
1);
22ab3625cabc29 Dale B Stimson 2021-04-13  199  
22ab3625cabc29 Dale B Stimson 2021-04-13  200   /*
22ab3625cabc29 Dale B Stimson 2021-04-13  201    * Anything in the upper-32 
bits of vlo gets added into vhi here,
22ab3625cabc29 Dale B Stimson 2021-04-13  202    * and then cleared from vlo.
22ab3625cabc29 Dale B Stimson 2021-04-13  203    */
22ab3625cabc29 Dale B Stimson 2021-04-13  204   vhi = (SF_ENERGY * vhi) + (vlo 
>> 32);
22ab3625cabc29 Dale B Stimson 2021-04-13  205   vlo &= 0xffffffffULL;
22ab3625cabc29 Dale B Stimson 2021-04-13  206  
22ab3625cabc29 Dale B Stimson 2021-04-13  207   /*
22ab3625cabc29 Dale B Stimson 2021-04-13  208    * Apply the right shift.
22ab3625cabc29 Dale B Stimson 2021-04-13  209    * - vlo shifted by itself.
22ab3625cabc29 Dale B Stimson 2021-04-13  210    * - vlo receiving what's 
shifted out of vhi.
22ab3625cabc29 Dale B Stimson 2021-04-13  211    * - vhi shifted by itself
22ab3625cabc29 Dale B Stimson 2021-04-13  212    */
22ab3625cabc29 Dale B Stimson 2021-04-13  213   vlo = vlo >> nshift;
22ab3625cabc29 Dale B Stimson 2021-04-13  214   vlo |= (vhi << (32 - nshift)) & 
0xffffffffULL;
22ab3625cabc29 Dale B Stimson 2021-04-13  215   vhi = vhi >> nshift;
22ab3625cabc29 Dale B Stimson 2021-04-13  216  
22ab3625cabc29 Dale B Stimson 2021-04-13  217   /* Combined to get a 64-bit 
result in vlo. */
22ab3625cabc29 Dale B Stimson 2021-04-13  218   vlo |= (vhi << 32);
22ab3625cabc29 Dale B Stimson 2021-04-13  219  
22ab3625cabc29 Dale B Stimson 2021-04-13  220   ret = scnprintf(buf, PAGE_SIZE, 
"%llu\n", vlo);
22ab3625cabc29 Dale B Stimson 2021-04-13  221  
22ab3625cabc29 Dale B Stimson 2021-04-13  222   return ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  223  }
22ab3625cabc29 Dale B Stimson 2021-04-13  224  
22ab3625cabc29 Dale B Stimson 2021-04-13  225  static ssize_t
22ab3625cabc29 Dale B Stimson 2021-04-13  226  
i915_power1_max_enable_show(struct device *dev, struct device_attribute *attr,
22ab3625cabc29 Dale B Stimson 2021-04-13  227                       char *buf)
22ab3625cabc29 Dale B Stimson 2021-04-13  228  {
22ab3625cabc29 Dale B Stimson 2021-04-13  229   struct drm_i915_private *i915 = 
dev_get_drvdata(dev);
22ab3625cabc29 Dale B Stimson 2021-04-13  230   struct intel_uncore *uncore = 
&i915->uncore;
22ab3625cabc29 Dale B Stimson 2021-04-13  231   intel_wakeref_t wakeref;
22ab3625cabc29 Dale B Stimson 2021-04-13  232   ssize_t ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  233   u32 reg_value;
22ab3625cabc29 Dale B Stimson 2021-04-13  234   bool is_enabled;
22ab3625cabc29 Dale B Stimson 2021-04-13  235  
22ab3625cabc29 Dale B Stimson 2021-04-13  236   
with_intel_runtime_pm(uncore->rpm, wakeref)
22ab3625cabc29 Dale B Stimson 2021-04-13  237           reg_value = 
intel_uncore_read(uncore,
22ab3625cabc29 Dale B Stimson 2021-04-13  238                                   
      i915->hwmon.rg.pkg_rapl_limit);
22ab3625cabc29 Dale B Stimson 2021-04-13  239  
22ab3625cabc29 Dale B Stimson 2021-04-13 @240   is_enabled = !!(reg_value & 
PKG_PWR_LIM_1_EN);
22ab3625cabc29 Dale B Stimson 2021-04-13  241  
22ab3625cabc29 Dale B Stimson 2021-04-13  242   ret = scnprintf(buf, PAGE_SIZE, 
"%u\n", is_enabled);
22ab3625cabc29 Dale B Stimson 2021-04-13  243  
22ab3625cabc29 Dale B Stimson 2021-04-13  244   return ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  245  }
22ab3625cabc29 Dale B Stimson 2021-04-13  246  
22ab3625cabc29 Dale B Stimson 2021-04-13  247  static ssize_t
22ab3625cabc29 Dale B Stimson 2021-04-13  248  
i915_power1_max_enable_store(struct device *dev, struct device_attribute *attr,
22ab3625cabc29 Dale B Stimson 2021-04-13  249                        const char 
*buf, size_t count)
22ab3625cabc29 Dale B Stimson 2021-04-13  250  {
22ab3625cabc29 Dale B Stimson 2021-04-13  251   struct drm_i915_private *i915 = 
dev_get_drvdata(dev);
22ab3625cabc29 Dale B Stimson 2021-04-13  252   struct intel_uncore *uncore = 
&i915->uncore;
22ab3625cabc29 Dale B Stimson 2021-04-13  253   struct i915_hwmon *hwmon = 
&i915->hwmon;
22ab3625cabc29 Dale B Stimson 2021-04-13  254   ssize_t ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  255   u32 val;
22ab3625cabc29 Dale B Stimson 2021-04-13  256   u32 bits_to_clear;
22ab3625cabc29 Dale B Stimson 2021-04-13  257   u32 bits_to_set;
22ab3625cabc29 Dale B Stimson 2021-04-13  258  
22ab3625cabc29 Dale B Stimson 2021-04-13  259   ret = kstrtou32(buf, 0, &val);
22ab3625cabc29 Dale B Stimson 2021-04-13  260   if (ret)
22ab3625cabc29 Dale B Stimson 2021-04-13  261           return ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  262  
22ab3625cabc29 Dale B Stimson 2021-04-13  263   bits_to_clear = 
PKG_PWR_LIM_1_EN;
22ab3625cabc29 Dale B Stimson 2021-04-13  264   if (!val)
22ab3625cabc29 Dale B Stimson 2021-04-13  265           bits_to_set = 0;
22ab3625cabc29 Dale B Stimson 2021-04-13  266   else
22ab3625cabc29 Dale B Stimson 2021-04-13  267           bits_to_set = 
PKG_PWR_LIM_1_EN;
22ab3625cabc29 Dale B Stimson 2021-04-13  268  
22ab3625cabc29 Dale B Stimson 2021-04-13  269   
_locked_with_pm_intel_uncore_rmw(uncore, hwmon->rg.pkg_rapl_limit,
22ab3625cabc29 Dale B Stimson 2021-04-13  270                                   
 bits_to_clear, bits_to_set);
22ab3625cabc29 Dale B Stimson 2021-04-13  271  
22ab3625cabc29 Dale B Stimson 2021-04-13  272   return count;
22ab3625cabc29 Dale B Stimson 2021-04-13  273  }
22ab3625cabc29 Dale B Stimson 2021-04-13  274  
22ab3625cabc29 Dale B Stimson 2021-04-13  275  static ssize_t
22ab3625cabc29 Dale B Stimson 2021-04-13  276  
i915_power1_max_interval_show(struct device *dev, struct device_attribute *attr,
22ab3625cabc29 Dale B Stimson 2021-04-13  277                         char *buf)
22ab3625cabc29 Dale B Stimson 2021-04-13  278  {
22ab3625cabc29 Dale B Stimson 2021-04-13  279   struct drm_i915_private *i915 = 
dev_get_drvdata(dev);
22ab3625cabc29 Dale B Stimson 2021-04-13  280   struct intel_uncore *uncore = 
&i915->uncore;
22ab3625cabc29 Dale B Stimson 2021-04-13  281   struct i915_hwmon *hwmon = 
&i915->hwmon;
22ab3625cabc29 Dale B Stimson 2021-04-13  282   ssize_t ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  283   u64 ullval;
22ab3625cabc29 Dale B Stimson 2021-04-13  284  
22ab3625cabc29 Dale B Stimson 2021-04-13  285   ullval = 
_field_read_and_scale(uncore, hwmon->rg.pkg_rapl_limit,
22ab3625cabc29 Dale B Stimson 2021-04-13  286                                  
PKG_PWR_LIM_1_TIME,
22ab3625cabc29 Dale B Stimson 2021-04-13  287                                  
hwmon->scl_shift_time, SF_TIME);
22ab3625cabc29 Dale B Stimson 2021-04-13  288  
22ab3625cabc29 Dale B Stimson 2021-04-13  289   ret = scnprintf(buf, PAGE_SIZE, 
"%llu\n", ullval);
22ab3625cabc29 Dale B Stimson 2021-04-13  290  
22ab3625cabc29 Dale B Stimson 2021-04-13  291   return ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  292  }
22ab3625cabc29 Dale B Stimson 2021-04-13  293  
22ab3625cabc29 Dale B Stimson 2021-04-13  294  static ssize_t
22ab3625cabc29 Dale B Stimson 2021-04-13  295  
i915_power1_max_interval_store(struct device *dev,
22ab3625cabc29 Dale B Stimson 2021-04-13  296                          struct 
device_attribute *attr,
22ab3625cabc29 Dale B Stimson 2021-04-13  297                          const 
char *buf, size_t count)
22ab3625cabc29 Dale B Stimson 2021-04-13  298  {
22ab3625cabc29 Dale B Stimson 2021-04-13  299   struct drm_i915_private *i915 = 
dev_get_drvdata(dev);
22ab3625cabc29 Dale B Stimson 2021-04-13  300   struct intel_uncore *uncore = 
&i915->uncore;
22ab3625cabc29 Dale B Stimson 2021-04-13  301   struct i915_hwmon *hwmon = 
&i915->hwmon;
22ab3625cabc29 Dale B Stimson 2021-04-13  302   ssize_t ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  303   long val;
22ab3625cabc29 Dale B Stimson 2021-04-13  304  
22ab3625cabc29 Dale B Stimson 2021-04-13  305   ret = kstrtoul(buf, 0, &val);
22ab3625cabc29 Dale B Stimson 2021-04-13  306   if (ret)
22ab3625cabc29 Dale B Stimson 2021-04-13  307           return ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  308  
22ab3625cabc29 Dale B Stimson 2021-04-13  309   _field_scale_and_write(uncore, 
hwmon->rg.pkg_rapl_limit,
22ab3625cabc29 Dale B Stimson 2021-04-13  310                          
PKG_PWR_LIM_2_TIME,
22ab3625cabc29 Dale B Stimson 2021-04-13  311                          
hwmon->scl_shift_time, SF_TIME, val);
22ab3625cabc29 Dale B Stimson 2021-04-13  312  
22ab3625cabc29 Dale B Stimson 2021-04-13  313   return count;
22ab3625cabc29 Dale B Stimson 2021-04-13  314  }
22ab3625cabc29 Dale B Stimson 2021-04-13  315  
22ab3625cabc29 Dale B Stimson 2021-04-13  316  static ssize_t
22ab3625cabc29 Dale B Stimson 2021-04-13  317  
i915_power1_cap_enable_show(struct device *dev, struct device_attribute *attr,
22ab3625cabc29 Dale B Stimson 2021-04-13  318                       char *buf)
22ab3625cabc29 Dale B Stimson 2021-04-13  319  {
22ab3625cabc29 Dale B Stimson 2021-04-13  320   struct drm_i915_private *i915 = 
dev_get_drvdata(dev);
22ab3625cabc29 Dale B Stimson 2021-04-13  321   struct intel_uncore *uncore = 
&i915->uncore;
22ab3625cabc29 Dale B Stimson 2021-04-13  322   struct i915_hwmon *hwmon = 
&i915->hwmon;
22ab3625cabc29 Dale B Stimson 2021-04-13  323   intel_wakeref_t wakeref;
22ab3625cabc29 Dale B Stimson 2021-04-13  324   ssize_t ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  325   u32 reg_value;
22ab3625cabc29 Dale B Stimson 2021-04-13  326   bool is_enabled;
22ab3625cabc29 Dale B Stimson 2021-04-13  327  
22ab3625cabc29 Dale B Stimson 2021-04-13  328   
with_intel_runtime_pm(uncore->rpm, wakeref)
22ab3625cabc29 Dale B Stimson 2021-04-13  329           reg_value = 
intel_uncore_read(uncore,
22ab3625cabc29 Dale B Stimson 2021-04-13  330                                   
      hwmon->rg.pkg_rapl_limit_udw);
22ab3625cabc29 Dale B Stimson 2021-04-13  331  
22ab3625cabc29 Dale B Stimson 2021-04-13 @332   is_enabled = !!(reg_value & 
PKG_PWR_LIM_2_EN);
22ab3625cabc29 Dale B Stimson 2021-04-13  333  
22ab3625cabc29 Dale B Stimson 2021-04-13  334   ret = scnprintf(buf, PAGE_SIZE, 
"%u\n", is_enabled);
22ab3625cabc29 Dale B Stimson 2021-04-13  335  
22ab3625cabc29 Dale B Stimson 2021-04-13  336   return ret;
22ab3625cabc29 Dale B Stimson 2021-04-13  337  }
22ab3625cabc29 Dale B Stimson 2021-04-13  338  

---
0-DAY CI Kernel Test Service, Intel Corporation
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