On Mon, Jun 17, 2019 at 05:00:54PM -0700, Alexander Ivanov wrote:
> On Mon, 17 Jun 2019 09:39 -07:00, Andy Shevchenko 
> <[email protected]> wrote:
> > 
> > How come that this device is GPIO?
> > I mean what makes you, guys, to come to this conclusion?
> > 
> 
> Intel document 332996-002EN [1] chapter 28 says GPP_* groups are accessible 
> through the PCH Sideband Interface, while 332690-004EN [2] defines P2SB at 
> d31.f1 
> 
> Obviously, I am wrong here. However, the question stands, is there linux 
> kernel support for Intel PCH GPIO?

Yes. Most of the SoCs from Intel use GPIO IP based on Chassis specification,
the drivers for which are available under drivers/pinctrl/intel. What you are
looking for is located under PINCTRL_SUNRISEPOINT configuration option.

> [1] 
> http://www.intel.cn/content/dam/www/public/us/en/documents/datasheets/6th-gen-core-pch-u-y-io-datasheet-vol-2.pdf
> [2] 
> https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/100-series-chipset-datasheet-vol-1.pdf

-- 
With Best Regards,
Andy Shevchenko



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