As of now KiCAD uses a 16-bit bitfield for layers although work is
apparently underway to fix this.

Your request for a stackup file should probably be merged with
https://bugs.launchpad.net/kicad/+bug/961533.

I filed the ticket a long time ago and got too busy with school stuff to
implement it.

On Wed, 2014-06-04 at 20:48 -0400, Jean-Paul Louis wrote:
> Lorenzo and all,
> 
> I see in your last very descriptive email, that the number of copper layers 
> seems to be limited to 16.
> 
> Does that mean that my 20 layers backplane will have to use 4 custom layers 
> that really will be copper.
> Will the routing of those custom layers be even possible? How pcbnew will 
> treat those 4 new layers? Will I be able to have vias that connect to those 
> layers?
> 
> High speed digital systems routinely have backplanes with 20 or more layers, 
> and a thickness varying from 3.2mm to 6.35mm. And due to the need for 
> impedance controlled layers, there are quite a few power layers to generate 
> strip-lines, and other distributed constant lines, so vias with thermal 
> relief are also needed with a way to edit the way the thermal relief is done 
> (signal versus high current). I have not found a way to create thermal relief 
> in vias. Is it described somewhere?
> 
> Could we use a PCB stack-up file that would define a set of attributes for 
> each layer. The attributes would be a Layer ID, Layer Type, Layer Position in 
> the stack, Usage that would let us know is it is a physical layer (Board 
> blank, Copper, Solder Mask, Solder Paste screen, Silk Screen, etc..), or a 
> documentation layer (Assembly drawing, BOM, ECO1-N, etc..).
> 
> It might be too late now, as you might have good reasons for not changing 
> (too much code relying on existing stack-up), but that would definitely 
> increase the strength of KiCad.
> 
> Jean-Paul
> AC9GH
> 
> 
> On Jun 4, 2014, at 6:06 PM, Lorenzo Marcantonio <[email protected]> 
> wrote:
> 
> > On Wed, Jun 04, 2014 at 05:29:48PM -0400, Jean-Paul Louis wrote:
> >> Edge.Cut was not an obvious candidate for me, but I can live with that 
> >> name, but I think it should one of the mandatory layers, not a user 
> >> defined one. Every PCB will need an outline, and circles and arcs would be 
> >> nice if allowed in outlines.
> > 
> > It's *extremely* mandatory and it has a lot of special cases, don't
> > worry about that... arcs are allowed in outlines (however you can only
> > draw arcs of 90 degrees, now...)
> > 
> >> About the height of the parts, I agree with Tom that this should be a 
> >> field in the Footprint itself, as that’s where the physical info 
> >> (dimensions) of the part (pads, holes) is/can be stored. Height of the 
> >> part is very important for placement machines, and is used to define the 
> >> sequence of parts, i.e. the tallest parts are placed last. Usually not an 
> >> issue with chip shooters, but down the line, it is critical for the IC and 
> >> Odd Shape placer/inserter.
> > 
> > I think is better to use the IDF info (or, conversely, use that value to
> > build a 'default' IDF from the assembly drawing). And anyway these are
> > problems appearing looong way after the layout process, I don't think we
> > should care. Machine operators know better than you and me. And have
> > very expensive software provided with the very expensive machine to do
> > these consideration.
> > 
> > Otherwise the first thing you'll have to do is to sort the drill tape
> > for minimum travel...without knowing how the mill is tooled, of course.
> > 
> > 
> > -- 
> > Lorenzo Marcantonio
> > Logos Srl
> > 
> > _______________________________________________
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> 
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-- 
Andrew Zonenberg
PhD student, security group
Computer Science Department
Rensselaer Polytechnic Institute
http://colossus.cs.rpi.edu/~azonenberg/

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