Le 14/09/2015 06:17, Joseph Chen a écrit : > @Wayne and @JP, > > Could try ERC on this simple schematic file? > > Attached, you can find a test schematic file that has an unintended > unmatched local labels, and current kicad ERC does not detect them. > > In the test schematic file, there is a mis-spelled local label on the > right hand side. The local labels are constructed with an intention of > using them to serve as ratnets, not just a convenient text. > With this kind of mis-detected errors, the PCB will not have the > intended ratnet at all and thus no copper track will be laid out, and > thus the manufactured boards will be bad. > > --Joe
The test schematic looks good for a reader. You said: "The local labels are constructed with an intention of using them to serve as ratnets, not just a convenient text" But only the designer (you) knows that. Detecting mis-spelled local labels is not so easy, if you want to avoid noise. And if there is noise, this feature is useless. Many designers widely use a local label (and only one) to name a net for many reasons. This is not necessary a design error (in fact 99% of cases are not an error) Having said that, I think you could send us a patch, at least to try this feature, and see how useful it is in many different designs, and perhaps improve it to avoid noise. But keep in mind testing a patch and include it in a stable release are not the same thing. -- Jean-Pierre CHARRAS _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : [email protected] Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
