> On Feb 6, 2016, at 11:12 AM, Thor-Arne <[email protected]> wrote: > > Then how is pcbnew supposed to know what's going to be connected? > I have not been using hierarchies much, is the nets separated?
With hierarchical designs, the netlister builds net names into something that looks like a Unix path. Say you have a lower-level sheet called Foo.sch, and this sheet has a net called Bar. Foo.sch is instantiated in a top-level schematic. Rename its instance name of u_foo because the default is a jumbled unique-value string. The netlister will call that net /u_foo/Bar If you have two instances of Foo.sch called u_foo_1 and u_foo_2, that net Bar will NOT be the same (unless you make it global), and the netlister creates two nets called /u_foo_1/bar and /u_foo_2/bar This is how you can have multiple “channels” of replicated instances of lower-level sheets. The annotator will assign unique reference designators to the components on the sheets, so an op-amp in u_foo_1 might be called U12 and that same symbol in u_foo_2 might be called U18. An even more interesting situation. Say you have a schematic microcontroller.sch which is instantiated in the top level as u_micro, and this sheet has two outputs foo and bar. Say you have another schematic output.sch which is also instantiated in the top level as u_output, and this sheet takes foo and bar in as inputs. The netlister will give you nets called /u_micro/foo and /u_micro/bar -a _______________________________________________ Mailing list: https://launchpad.net/~kicad-developers Post to : [email protected] Unsubscribe : https://launchpad.net/~kicad-developers More help : https://help.launchpad.net/ListHelp
