Hi,
I have been working with several PCB manufacturers who usually complain about
the vias being covered with solder resist (I believe "tented" is the correct
term). When I generate the gerbers from KiCAD, I can see that no openings for
the VIAs are operated in the solder mask, which means that basically the vias
are covered in solder mask (green stuff).
Is there an automated way to make solder mask openings around all the vias in
the design (I mean, a different way than doing it manually for every via, with
zones)?
I am familiar with the "Mask Clearance" setting under the "Dimensions-> Traks
and vias" menu, but it does not seem to operate on vias.
Thanks in advance,
Cristian
