--- In [email protected], "Christos Nikolaou" <sv1...@...> wrote: > > --- In [email protected], Dick Hollenbeck <dick@> wrote: > > > > This could be some kind of buffer overrun that happens when reading your > > *.sch file back into memory. > > > > Take a look at your *.sch file in a text editor and post the 2nd line > > here so we can see it. It starts with a LIBS: string. > > > > Dick > > > > Hi Dick, > > I've started with a blank new project and added only the libs and mods I need > and it is working ok now. > > The previous project's LIBS:, well, its a bit big as a text. It has 913 libs. >
yes and each LIB contains a set of symbols which all have to be loaded in memory in order to find a referenced symbol. I'm wondering to help library management if instead of each LIB being a file (.lib), it could be a directory name containg the symbols (.sym). Similarly for module (.mod) libaries a collection of footprints (.emp) files and cache files would become directories as well. It would make symbols and footprints easier to find, replace using a file browser (in Unix 'ls' or 'find') and the file time stamps could be used. Project library archive would then only need to save the design, referenced symbols and footprints. Code changes could even support both schemes for a while and a library unpack utility could be provided. -Frank > > Here it is: > > LIBS:power,Zilog-ZNEO-v1_0,zilog-z8-encore-v1_2a,Zilog-Z8-Encore-v1_1,Zilog-eZ80-v1_0,zilog,zettl,zetex,z8encore8k_v10,xtx-board,x-port,xilinx-xc3sxxxe_vq100,xilinx_xc9572xl-tq100,xilinx_virtexii-xc2v80&flashprom,Xilinx_VirtexII_Pro,Xilinx_VirtexII,xilinx_spartan3,xilinx_spartan2e,XILINX2,xenpak-msa,xdr-dram-toshiba,xc3s200-tq144,xc2v1000fg456,wuerth-elektronik_v4, . . . ,19inch,7sh,3M,1wire,zx4125p,device,transistors,conn,linear,regul,74xx,cmos4000,adc-dac,memory,xilinx,special,microcontrollers,dsp,microchip,analog_switches,motorola,texas,intel,audio,interface,digital-audio,philips,display,cypress,siliconi,opto,atmel,contrib,valves >
