Quite often a small panel is included on the schematic, usually on the right hand side above the title and such like, which would indicate the power connections for various chips. This would identify the power to the various IC's sort of like:
IC pin pwr 1 1 vcc 1 2 gnd 2 1 +5 2 2 0v Or whatever format you want to use, again normally contained in a nice grid. Some people do similar things for common components such as decoupling caps. (rather than printing the value 100's of times on the cct diagram they just leave the component ID and add a panel stating that c1,2,3,4,5,6 and so omn are 0.001uF. Obviously only done if there are a LOT od such things, but it all helps to reduce the clutter. Andy On Tue, 15 Sep 2009 15:24:52 -0500 "Jim Hughen" <[email protected]> wrote: > Hi Andy > > Yes, there are many different ways of designing stuff. I have found that is > very important to remember. > > If we have a design review of the schematic prior to the PCB layout > activities, how are the power pin connections made known to the reviewers if > they are hidden on the schematic? > > thanks, > ...Jim H. > > ----- Original Message ----- > From: Andy Eskelson > To: [email protected] > Sent: Tuesday, September 15, 2009 9:06 AM > Subject: Re: [kicad-users] A rule check issue that is confusing me. I have > GND comming from a header > > > A power pin that is "driven" is one that provides power. > This can be done when a device such as a regulator has a POWER OUT pin > defined. Power out pins are automatically driven, so the DRC knows what > to do about them. You also add power port symbols to your cct to > indicate connections or groups of connections that need to connect to a > particular power line, a common example is the small triangle for VSS. > You can place these all over your cct and they will effectually form an > invisible connection between them. > > When you have a power line on the circuit, it may be that it is not > connected to anything that is driven, power could come in off board. In > these cases you need to tell the system that there is actually power on > these lines. That's where the power flags come in. > > If I remember correctly, if you have hidden pins shown on the ct, then you > have to connect these manually. With a very small circuit there is > nothing wrong with this, however if your circuit is more complex then the > ability to remove the power lines makes things much neater and less > cluttered. Most circuit diagrams you will come across will use this > technique. > > Declaring everything passive, will effectively disable most of the DRC > checks, so use with caution. > > When you use the hidden power pins, the connections are still there, > shown on the ratsnest, so you can check them as you lay out the board. > > This is one aspect of the system that seems to confuse people at first. > Once you get the idea as to what is going on it's quite simple and you > wonder what all the fuss was about. One thing to remember is that there > are lots of different circuit designs, and the system has to be flexible > enough to cater for all of them, hence you as the designer have to give > the system a little help from time to time. Telling the system what lines > are powered is one such things you can do. > > Andy > > On Tue, 15 Sep 2009 08:10:57 -0500 > "Jim Hughen" <[email protected]> wrote: > > > This is the same problem I had in a recent post. > > The ERC sees a whole set of power pins as 'driven' (they need to have > power supplied to them). Then there must be a singular 'power' pin (I'm not > sure how to specify it) that supplies power to the others. Your error is > saying that this single power output pin has not been declared. > > > > I am loathe to permit any warnings in the ERC, but I have allowed this > one for the time being. It is a good idea to do error checking in the > schematic, of course. And even to check that inputs are driven by outputs. I > have just found the work to put this information into the schematic is not > very productive. I think this may be a result of many confusing circuit node > characteristics when connectivity is characterized by a rule set. > > > > So, I declared everything 'passive'. Still running the ERC is very > necessary. That's when I got this error 'GND is not driven'. I could not find > a work around that did not require placing info into the schematic about the > directional characteristics of the power pin' > > > > BTW - I do not use hidden power pins. Why do it? Those are very important > to the circuit. I just don't want them to be implicit or described in a > reference table. There might be some error between the reference table and > the hidden power pin declarations that is not found untill the PCB prototype > is powered up. > > > > KiCAD is a great tool! > > > > ...Jim H. > > > > > > > > ----- Original Message ----- > > From: josh_eeg > > To: [email protected] > > Sent: Tuesday, September 15, 2009 6:17 AM > > Subject: [kicad-users] A rule check issue that is confusing me. I have > GND comming from a header > > > > > > > > A rule check issue that is confusing me. I have GND comming from a > header. Their is the same GND in other places on the circuit. > > But I get a error like it should be driven. But that sounds like a > short... > > ERC: Warning Pin Power_In not driven. > > I have GND hooked to a header... Now that same ground simbol is in the > rest of my circuit. > > Please help. > > > > > > > > > > >
