Thanks it would work !
--- In [email protected], Andy Eskelson <andyya...@...> wrote:
>
> The only suggestion I have is to change the pin definitions, change the
> pins you want to be ignored to undefined and that should stop ERC
> flagging them as an error.
>
> You should keep this as a special part, but as FGPGA's are normally all
> special that should not be too much of a problem.
>
> Andy
>
>
>
> On Wed, 30 Dec 2009 10:53:21 -0000
> "ayewinoung" <ayewino...@...> wrote:
>
> > Hi all
> >
> > Is there a way to "disable" ERC check on particular net, port ?
> >
> > I've FPGA pins which are bidi and some of them, I like to connect straight
> > to GND (for better EMC). At the same time I like to keep the ERC checks to
> > fail on "bidi to pwr" connections, except the nets/ports that is marked
> > with "exceptions".
> >
> > Any idea to achieve this ?
> >
> > Thanks all.
> >
> >
> >
> > ------------------------------------
> >
> > Please read the Kicad FAQ in the group files section before posting your
> > question.
> > Please post your bug reports here. They will be picked up by the creator of
> > Kicad.
> > Please visit http://www.kicadlib.org for details of how to contribute your
> > symbols/modules to the kicad library.
> > For building Kicad from source and other development questions visit the
> > kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups
> > Links
> >
> >
> >
>
