I made a relatively simple board consisting of two through-hole connectors and one or two surface mount devices. Since I had double-sided available I thought I'd use it to provide extra current capability, so after making my point-to-point connections on one side (satisfying the DRC with no unrouted nets) I switched to the other layer and repeated the connections. But when I generated the gerber files only the traces for one side appeared. Everything else was correct: all the through holes had both copper and component layer annuli, and the one SMD component had the correct component layer traces. But the additional (redundant) traces on the copper side were removed.
Is this an intentional feature of the program? Is there a way to disable it? Thanks, --Jim
