You can post feature requests here: http://sourceforge.net/tracker/?atid=762479&group_id=145591&func=browse
Regards, Robert. On 17/03/2010 17:03, mtheling wrote: > > > All, thank you for your answers. > > As Robert explains my intention was to connect different components from the > same component type to different supply. (For example VCC and VCC_switched). > > What I can see in my example is, that as soon as I connect a PWR_Flag to the > +5V net, the component U2a is correctly connected only to +5V in PCBnew. > There is not bridge from +5V to VCC, this is like I intent. > However, Eeschema states the mentioned error. > > If I don't connect a PWR_flag to the +5V Net, all components including > U2A,B,C are connected to the VCC net an there is no +5V net in PCBnew. > > As Andy proposed I will try the simple practise solution to create a > component for each supply voltage. > > I like to propose an idea / feature request to make the supply net of an > component editable, so that the supply net can be change as parameter > directly from eeschema. > > Thank you very much for your help! > > Best Regards, > Mark > > > --- In [email protected], Robert<birmingham_spi...@...> wrote: >> >> Thanks for your suggestion. You're right that the connected power rail >> does not override the pin name on these logic chips. >> >> Another solution might be to create a logic component with the relevant >> gates plus a power block that could be connected to the appropriate >> rail(s) and tucked out of the way (and associated on the schematic with >> the decoupling capacitor). >> >> Regards, >> >> Robert. >> >> On 16/03/2010 16:13, Andy Eskelson wrote: >>> You can manually connect the power if you enable show hidden pins in >>> eeschema, but that means that you have to manually connect all the power >>> pins up. What I don't know because I've never tried it, is if that >>> over-rides the pin names for DRC. I would guess not. >>> >>> In practise the solution is very simple. >>> >>> Duplicate the library part and change the name of the power pins to >>> something else. For example change Vcc to +5V, then you can use a +5V >>> power port which will connect to just that chip. >>> >>> Obviously you save the part under a different name, then that part will >>> connect to the new power net. >>> >>> You could also just identify the pins as power in, and not give them a >>> special name& untick the not drawn box, this would meant that you need >>> to manually connect them. For small circuits this is not much of a >>> problem, however it can get messy if you have a reasonable number of IC's >>> to connect. >>> >>> >>> Andy >>> >>> >>> >>> >>> >>> On Tue, 16 Mar 2010 14:07:21 +0000 >>> Robert<birmingham_spi...@...> wrote: >>> >>>> Thanks for your replies Carl and Andy. >>>> >>>> Speaking for myself, I have designs that use two instances of the same >>>> micro, with each instance on a different supply rail. These micros all >>>> have a power pin named VCC and I have no problems with ERC, so Kicad >>>> isn't covertly connecting my VCC pins together. >>>> >>>> The OP (Mark) wants to have logic chips on two different supply rails, >>>> but it seems that Kicad joins up all the hidden pins marked Vcc, even if >>>> you connect the power pin to a different rail. Is the critical factor >>>> that the pins are hidden, is it that the name case sensitive, or is it a >>>> feature of multi-part components? It's not that the pin doesn't have a >>>> number, because the logic chip symbols have both name and number >>>> specified for the power pins (like the symbols I have created for >>>> myself). What is the critical thing that Mark has to change to allow >>>> him to connect two logic chips to two different supply rails. >>>> >>>> Regards, >>>> >>>> Robert. >>>> >>>> >>>> >>>> On 16/03/2010 11:14, Andy Eskelson wrote: >>>>> Vcc IS the power to the chip, U2A in this case. >>>>> so why have you connected +5V to it as well? >>>>> >>>>> DRC is detecting that you have effectively shorted VCC to a different 5V >>>>> supply as well, and is complaining about it. >>>>> >>>>> Power flags are defined as power out pins, and you only have one power >>>>> out on a power net,m if you add a second power flag DRC will complain >>>>> about that as well. >>>>> >>>>> I think you are assuming that you need to connect 5 volts to the chip, >>>>> and so are adding the +5V port, which is another independent supply net. >>>>> Hence the confusion. >>>>> >>>>> The system works as has been mentioned by the power port names. When a >>>>> device has a power pin with a specific name, AND you set the pin to be >>>>> invisible you DO NOT need to connect anything else to it. As soon as you >>>>> put a power port with the same name onto the circuit diagram, that port is >>>>> automatically connected to all device power pins with the same name. >>>>> >>>>> >>>>> A power net needs to be energised or DRC will complain. That can be done >>>>> in two ways. Either a device such as a regulator can have a power out >>>>> pin, which will indicate that it is energised, OR you add a power flag, >>>>> which simply says that the net is energised. You use power flags in >>>>> situations where you are connecting an external power source to your >>>>> circuit via a connector, flying leads and so on. >>>>> >>>>> The one oddity is that GND is considered a power out type net as well, so >>>>> it also needs energising with a power flag. >>>>> >>>>> logic IC's have generally had their power pins identified by names >>>>> rather than the voltage, so you have Vcc Vss Vdd and so on. >>>>> >>>>> When you run into such chips, the same will apply, power ports of the >>>>> same name are already considered to be connected to the physical supply >>>>> >>>>> Andy >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> On Mon, 15 Mar 2010 16:13:15 -0000 >>>>> "mtheling"<p...@...> wrote: >>>>> >>>>>> Hi Robert, >>>>>> >>>>>> if I connect for example a net "+5V" to a component U2A which has an VCC >>>>>> input as invisible pin, I see that in PCBnew the pin is connected to >>>>>> the "+5V" net as soon as I set an Powerflag to +5V. >>>>>> But the ERC check in eeschema states this as error : >>>>>> ErrType(5): Conflict problem between pins. Severity: error >>>>>> @ (5,1000 ",6,7500 "): Cmp #FLG01, Pin 1 (power_out) connected to >>>>>> @ (4,4000 ",6,7500 "): Cmp #FLG06, Pin 1 (power_out) (net 3) >>>>>> >>>>>> If I don't connect a Powerflag to the "+5V" net, in PCBnew the Power Pin >>>>>> of U2A is still connect to the VCC net and not to "+5V" as set in the >>>>>> schematic. >>>>>> Please see schematic for example: >>>>>> http://www.swapout.de/example_schematic.pdf >>>>>> >>>>>> What I am doing wrong? >>>>>> >>>>>> Thank you, >>>>>> >>>>>> best Regards, >>>>>> Mark >>>>>> >>>>>> >>>>>> >>>>>> >>>>>> ------------------------------------ >>>>>> >>>>>> Please read the Kicad FAQ in the group files section before posting your >>>>>> question. >>>>>> Please post your bug reports here. They will be picked up by the creator >>>>>> of Kicad. >>>>>> Please visit http://www.kicadlib.org for details of how to contribute >>>>>> your symbols/modules to the kicad library. >>>>>> For building Kicad from source and other development questions visit the >>>>>> kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! >>>>>> Groups Links >>>>>> >>>>>> >>>>>> >>>>> >>>>> >>>>> ------------------------------------ >>>>> >>>>> Please read the Kicad FAQ in the group files section before posting your >>>>> question. >>>>> Please post your bug reports here. They will be picked up by the creator >>>>> of Kicad. >>>>> Please visit http://www.kicadlib.org for details of how to contribute >>>>> your symbols/modules to the kicad library. >>>>> For building Kicad from source and other development questions visit the >>>>> kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! >>>>> Groups Links >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> >>>>> No virus found in this incoming message. >>>>> Checked by AVG - www.avg.com >>>>> Version: 9.0.790 / Virus Database: 271.1.1/2749 - Release Date: 03/15/10 >>>>> 19:33:00 >>>>> >>>> >>>> ------------------------------------ >>>> >>>> Please read the Kicad FAQ in the group files section before posting your >>>> question. >>>> Please post your bug reports here. They will be picked up by the creator >>>> of Kicad. >>>> Please visit http://www.kicadlib.org for details of how to contribute your >>>> symbols/modules to the kicad library. >>>> For building Kicad from source and other development questions visit the >>>> kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! >>>> Groups Links >>>> >>>> >>>> >>> >>> >>> ------------------------------------ >>> >>> Please read the Kicad FAQ in the group files section before posting your >>> question. >>> Please post your bug reports here. They will be picked up by the creator of >>> Kicad. >>> Please visit http://www.kicadlib.org for details of how to contribute your >>> symbols/modules to the kicad library. >>> For building Kicad from source and other development questions visit the >>> kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups >>> Links >>> >>> >>> >>> >>> >>> >>> No virus found in this incoming message. >>> Checked by AVG - www.avg.com >>> Version: 9.0.790 / Virus Database: 271.1.1/2750 - Release Date: 03/16/10 >>> 07:33:00 >>> >> >> >> No virus found in this outgoing message. >> Checked by AVG - www.avg.com >> Version: 9.0.790 / Virus Database: 271.1.1/2750 - Release Date: 03/16/10 >> 07:33:00 >> > > > > > ------------------------------------ > > Please read the Kicad FAQ in the group files section before posting your > question. > Please post your bug reports here. They will be picked up by the creator of > Kicad. > Please visit http://www.kicadlib.org for details of how to contribute your > symbols/modules to the kicad library. > For building Kicad from source and other development questions visit the > kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups > Links > > > > > > > No virus found in this incoming message. > Checked by AVG - www.avg.com > Version: 9.0.791 / Virus Database: 271.1.1/2752 - Release Date: 03/17/10 > 07:33:00 >
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