Nitin A Kamble wrote:
> Hi Avi,
> Attached is the patch to implement emulation of instructions
> mov rl, imm8 (opcodes 0xb0-0xb3)
> mov rh, imm8 (opcodes 0xb4-0xb7)
> mov r, imm (opcodes0xb8-0xbf)
>
>
> @@ -146,8 +146,12 @@ static u16 opcode_table[256] = {
> 0, 0, ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
> ByteOp | ImplicitOps | Mov, ImplicitOps | Mov,
> ByteOp | ImplicitOps, ImplicitOps,
> - /* 0xB0 - 0xBF */
> - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
> + /* 0xB0 - 0xB7 */
> + Mov | SrcImmByte, Mov | SrcImmByte, Mov | SrcImmByte, Mov |
> SrcImmByte,
> + Mov | SrcImmByte, Mov | SrcImmByte, Mov | SrcImmByte, Mov |
> SrcImmByte,
> + /* 0xB8 - 0xBF */
> + Mov | SrcImm, Mov | SrcImm, Mov | SrcImm, Mov | SrcImm,
> + Mov | SrcImm, Mov | SrcImm, Mov | SrcImm, Mov | SrcImm,
> /* 0xC0 - 0xC7 */
Perhaps adding DstReg would reduce the decoding code later on?
--
Any sufficiently difficult bug is indistinguishable from a feature.
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