> In parallel to the Processor ID Register (PIR) threaded POWER8 also adds a > Thread ID Register (TID). Since PR KVM doesn't emulate more than one thread
s/TID/TIR/ above > per core, we can just always expose 0 here. I'm not sure if we ever do, but if we IPI ourselves using a doorbell, we'll need to emulate the doorbell as well. Mikey > Signed-off-by: Alexander Graf <[email protected]> > --- > arch/powerpc/kvm/book3s_emulate.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/powerpc/kvm/book3s_emulate.c > b/arch/powerpc/kvm/book3s_emulate.c > index 914beb2..e4e54fb 100644 > --- a/arch/powerpc/kvm/book3s_emulate.c > +++ b/arch/powerpc/kvm/book3s_emulate.c > @@ -563,6 +563,7 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, > int sprn, ulong *spr_val > case SPRN_MMCR0: > case SPRN_MMCR1: > case SPRN_MMCR2: > + case SPRN_TIR: > *spr_val = 0; > break; > default: > -- > 1.8.1.4 > > -- > To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in > the body of a message to [email protected] > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
