On Sat, 27 Sep 2008, Avi Kivity wrote:
> Yang, Sheng wrote:
> > I think we should do a little more than just write msr to update mtrr.
> >
> > Intel SDM 10.11.8 "MTRR consideration in MP Systems" define the procedure to
> > modify MTRR msr in MP. Especially, step 4 enter no-fill cache mode(set
> > CR0.CD bit and clean NW bit), step 12 re-enabled the caching(clear this two
> > bits).
> >
> > We based on these behaviors to detect MTRR update.
> >
> >
>
> Why not simply flush the mmu on an mtrr write?
>
> (though of course I have no objection to doing what the manual says)
Detecting that condition is fine for operating systems which follow it,
but some don't, including older Linux kernels :( Flushing on MTRR write,
although being overzealous would be the most robust.
Zwane
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