On Mon, Jul 25, 2011 at 08:47:31AM -0500, Anthony Liguori wrote:
> On 07/25/2011 08:38 AM, Avi Kivity wrote:
> >On 07/25/2011 04:35 PM, Gleb Natapov wrote:
> >>>
> >>> That's the ISA TOM (15MB hole and friends).
> >>>
> >>Correct. What about:
> >>3.2.19. DRB[0:7] DRAM ROW BOUNDARY REGISTERS
> >>
> >>from 440fx spec?
> >>
> >
> >Maybe. But we can't use that, since it ignores address line 31.
> >
> >(440fx supports only 1GB RAM, and we're ignoring that)
>
> What are we trying to do?
>
I just tried to answer Avi's question about TOM register.
> Can't we just register highest RAM address under 4G to 4G as PCI
> memory and call it a day?
>
It is good idea to emulate existing functionality as close as possible,
but if existing functionality does not satisfy us (like in our case)
then yes, we can.
> Do we really need a guest visible register to do this?
>
> Regards,
>
> Anthony Liguori
>
> >
--
Gleb.
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