On May 20, 2013, at 10:29 AM, David Daney wrote: > On 05/20/2013 09:58 AM, Sanjay Lal wrote: >> >> On May 20, 2013, at 8:50 AM, David Daney wrote: >> >>> On 05/18/2013 10:47 PM, Sanjay Lal wrote: >>>> The following patch set adds support for the recently announced >>>> virtualization >>>> extensions for the MIPS32 architecture and allows running unmodified >>>> kernels in >>>> Guest Mode. >>>> >>>> For more info please refer to : >>>> MIPS Document #: MD00846 >>>> Volume IV-i: Virtualization Module of the MIPS32 Architecture >>>> >>>> which can be accessed @: >>>> http://www.mips.com/auth/MD00846-2B-VZMIPS32-AFP-01.03.pdf >>>> >>>> The patch is agains Linux-3.10-rc1. >>>> >>>> KVM/MIPS now supports 2 modes of operation: >>>> >>>> (1) VZ mode: Unmodified kernels running in Guest Mode. The processor now >>>> provides >>>> an almost complete COP0 context in Guest mode. This greatly reduces VM >>>> exits. >>> >>> Two questions: >>> >>> 1) How are you handling not clobbering the Guest K0/K1 registers when a >>> Root exception occurs? It is not obvious to me from inspecting the code. >>> >>> 2) What environment are you using to test this stuff? >>> >>> David Daney >>> >> >> (1) Newer versions of the MIPS architecture define scratch registers for >> just this purpose, but since we have to support standard MIPS32R2 >> processors, we use the DDataLo Register (CP0 Register 28, Select 3) as a >> scratch register to save k0 and save k1 @ a known offset from EBASE. >> > > Right, I understand that. But I am looking at arch/mips/mm/tlbex.c, and I > don't see the code that does that for TLBRefill exceptions. > > Where is it done for interrupts? I would expect code in > arch/mips/kernel/genex.S and/or stackframe.h would handle this. But I don't > see where it is. > > Am I missing something? > > David Daney >
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