Hi Dongjiu Geng,

On 22/02/18 18:02, Dongjiu Geng wrote:
> The RAS SError Syndrome can be Implementation-Defined,
> arm64_is_ras_serror() is used to judge whether it is RAS SError,
> but arm64_is_ras_serror() does not include this judgement. In order
> to avoid function name confusion, we rename the arm64_is_ras_serror()
> to arm64_is_categorized_ras_serror(), this function is used to
> judge whether it is categorized RAS Serror.

I don't see how 'categorized' is relevant. The most significant ISS bit is used
to determine if this is an IMP-DEF ESR, or one that uses the architected layout.

DFSC of zero means uncategorised. What should we do with an uncategorised 
SError?

>From 2.4.3 "ESB and other physical errors" of [0]
| It is IMPLEMENTATION DEFINED whether [..]uncategorized SError interrupts
| are containable or Uncontainable, and whether they can be synchronized by an
| Error Synchronization Barrier.

We treat uncategorized as uncontainable as that's the worst thing it could be.

On aarch32 uncontainable and uncategorized even share an encoding.
(AET:00 in G7.2.43 "DFSR, Data Fault Status Register", 'state of the PE after
taking the SError interrupt exception')


> Change some code notes, unrecoverable RAS errors is imprecise, but
> Recoverable RAS errors is precise.

Unrecoverable and Recoverable (but we don't know where it is) are both grouped
into 'can't make progress'. The comment says:
| The exception may have been imprecise.
because one of those two is imprecise.

If anyone cares which one is which, they can read the spec.

I expect this code will one day be replaced with proper kernel-first support,
its only here to avoid panic()ing due to corrected errors.


Thanks,

James

[0]
https://static.docs.arm.com/ddi0587/a/RAS%20Extension-release%20candidate_march_29.pdf
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