On 17/06/2019 16:43, Andrew Murray wrote:
On Thu, Jun 13, 2019 at 05:50:43PM +0100, Suzuki K Poulose wrote:
On 13/06/2019 10:39, Andrew Murray wrote:
On Thu, Jun 13, 2019 at 08:30:51AM +0100, Julien Thierry wrote:
index ae1e886d4a1a..88ce24ae0b45 100644
--- a/virt/kvm/arm/pmu.c
+++ b/virt/kvm/arm/pmu.c
@@ -47,7 +47,10 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64
select_idx)
counter += perf_event_read_value(pmc->perf_event, &enabled,
&running);
- return counter & pmc->bitmask;
+ if (select_idx != ARMV8_PMU_CYCLE_IDX)
+ counter = lower_32_bits(counter);
Shouldn't this depend on PMCR.LC as well? If PMCR.LC is clear we only
want the lower 32bits of the cycle counter.
Yes that's correct. The hunk should look like this:
- return counter & pmc->bitmask;
+ if (!(select_idx == ARMV8_PMU_CYCLE_IDX &&
+ __vcpu_sys_reg(vcpu, PMCR_EL0) & ARMV8_PMU_PMCR_LC))
+ counter = lower_32_bits(counter);
+
+ return counter;
May be you could add a macro :
#define vcpu_pmu_counter_is_64bit(vcpu, idx) ?
Yes I think a helper would be useful - though I'd prefer the name
'kvm_pmu_idx_is_long_cycle_counter'. This seems a little clearer as
you could otherwise argue that a chained counter is also 64 bits.
When you get to add 64bit PMU counter (v8.5), this would be handy. So
having it de-coupled from the cycle counter may be a good idea. Anyways,
I leave that to you.
Cheers
Suzuki
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