> > The problem is that the bridge chips don't handle ISA
> > interrupts too well: Basically, the 4:1 clock speed difference
> > causes each ISA interrupt to cause 4 interrupts on the PCI
> > bus. OUCH!
>
> Could you clarify this a little?  Could you explain *why* it generates
> 4 interrupts?  I *do* understand that 4 x 8 = 32, but this is the
> first time I have heard this story about 4 PCI interrupts for each ISA
> interrupt.  I just can't see *why*?

I can see where the TIME need to process the an ISA interrupts is 4x the
time needed to process an equivalent PCI interrupt (since ISA is so much
slower), but why would the PCI bridge controller issue *4* interrupts, every
time it saw 1 ISA interrupt coming ? Wouldn't that be ridiculously
repetitive - issuing the same interrupt 4 times? I can see where the PCI
device could have had 4 interrupts serviced in the time it takes an ISA to
process one.




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