Ken Moffat wrote:
But like you, the individual flags mean not-a-lot to me (I recognize
cmov, it's what was the difference between i686 and the earlier i589
- although some CPUs from, I think, VIA lacked it, and I recognize a
few others. I'm not particularly aware of the Core2 Duo (I couldn't
justify the cost when they were current), but perhaps it is old
enough to use slow memory.
Those flags show the capability of the CPU. In tel goes to a lot of
effort to make their cpus backward compatible so flags are rarely, if
ever, removed for newer cpus.
For instance, my Skylake has:
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht
tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art
arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx
smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2
x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c
rdrand lahf_lm abm 3dnowprefetch intel_pt tpr_shadow vnmi
flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2
smep bmi2 erms invpcid rtm mpx rdseed adx smap clflushopt
xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp
hwp_notify hwp_act_window hwp_epp
That very first entry, fpu, says it has a floating point unit. That goes
back to a 586 (the 486 had a separate 80487 floating point unit).
For instance, the sse, sse2, ssse3, sse4_1, sse4_2 all have to do with
SIMD instruction set capability.
You can look up any of the capabilities on Wikipedia, but generally it's
nothing that concerns us. I think the capabilities are generally used by
compilers when creating executable code, but some instructions are not
supported by compilers. For instance, I think you have to drop to
assembly to used SIMD registers or instructions.
-- Bruce
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