On 06/25/2012 05:10 PM, Jason Garrett-Glaser wrote: >> +cglobal conv_flt_to_s16p_6ch, 2,8,7, dst, src, dst1, dst2, dst3, dst4, >> dst5, len >> +%if ARCH_X86_64 >> + mov lend, r2d >> +%else >> + %define lend dword r2m >> +%endif >> + mov dst1q, [dstq+ gprsize] >> + mov dst2q, [dstq+2*gprsize] >> + mov dst3q, [dstq+3*gprsize] >> + mov dst4q, [dstq+4*gprsize] >> + mov dst5q, [dstq+5*gprsize] >> + mov dstq, [dstq ] >> + sub dst1q, dstq >> + sub dst2q, dstq >> + sub dst3q, dstq >> + sub dst4q, dstq >> + sub dst5q, dstq >> + mova m6, [pf_s16_scale] >> + ALIGN 16 >> +.loop: >> + mulps m0, m6, [srcq ] >> + mulps m3, m6, [srcq+ mmsize] >> + mulps m1, m6, [srcq+2*mmsize] >> + mulps m4, m6, [srcq+3*mmsize] >> + mulps m2, m6, [srcq+4*mmsize] >> + mulps m5, m6, [srcq+5*mmsize] > > Do these assemble on non-AVXto > > mova dst, [mem] > mulps dst, m6 > > or do they assemble to > > mova dst, m6 > mulps dst, [mem] > > ? > > If the latter, it'll be slower on non-AVX (splitting loads doesn't use > extra uops, extra moves does), so maybe ifdef it. > >> + cvtps2dq m0, m0 >> + cvtps2dq m1, m1 >> + cvtps2dq m2, m2 >> + cvtps2dq m3, m3 >> + cvtps2dq m4, m4 >> + cvtps2dq m5, m5 >> + packssdw m0, m3 ; m0 = 0, 1, 2, 3, 4, 5, 6, 7 >> + packssdw m1, m4 ; m1 = 8, 9, 10, 11, 12, 13, 14, 15 >> + packssdw m2, m5 ; m2 = 16, 17, 18, 19, 20, 21, 22, 23 >> + movhlps m3, m1 >> + movlhps m3, m2 ; m3 = 12, 13, 14, 15, 16, 17, 18, 19 >> + movlhps m1, m1 >> + movhlps m1, m0 ; m1 = 4, 5, 6, 7, 8, 9, 10, 11 >> + psrldq m1, 4 ; m1 = 6, 7, 8, 9, 10, 11, x, x >> + psrldq m2, 4 ; m2 = 18, 19, 20, 21, 22, 23, x, x >> + punpcklwd m4, m0, m1 ; m4 = 0, 6, 1, 7, 2, 8, 3, 9 >> + punpckhwd m0, m1 ; m0 = 4, 10, 5, 11, x, x, x, x >> + punpcklwd m1, m3, m2 ; m1 = 12, 18, 13, 19, 14, 20, 15, 21 >> + punpckhwd m3, m2 ; m3 = 16, 22, 17, 23, x, x, x, x >> + punpckldq m2, m4, m1 ; m2 = 0, 6, 12, 18, 1, 7, 13, 19 >> + punpckhdq m4, m1 ; m4 = 2, 8, 14, 20, 3, 9, 15, 21 >> + punpckldq m0, m3 ; m0 = 4, 10, 16, 22, 5, 11, 17, 23 >> + movlpd [dstq ], m2 >> + movhpd [dstq+dst1q], m2 >> + movlpd [dstq+dst2q], m4 >> + movhpd [dstq+dst3q], m4 >> + movlpd [dstq+dst4q], m0 >> + movhpd [dstq+dst5q], m0 > > Use movq and movhlps here.
Doing that is about 20 cycles slower on Athlon64 and makes no measurable difference on sandy bridge. -Justin _______________________________________________ libav-devel mailing list [email protected] https://lists.libav.org/mailman/listinfo/libav-devel
