On Tue, Dec 22, 2015 at 5:41 PM, Janne Grunau <[email protected]> wrote: > I found HTML copy from 1999 of Intel's manual(1) which says that > cvtpi2ps with a memory location as source doesn't cause a transition to > MMX state. The current documentation for cvtpi2pd (packed int to packed > double conversion) says the same. Valgrind wasn't following that that > until Vitor reported it as #210264(2) in 2009 and it was fixed in (3). > As Julian Seward says in the commit message the situation is a little > bit fishy.
Intel's current documentation is very clear on cvtpi2ps: "This instruction causes a transition from x87 FPU to MMX technology operation". For cvtpi2pd it does point out that a state transition only happens when the source is an MMX registers. I'm guessing that this difference in behavior is due to the fact that cvtpi2ps is SSE while cvtpi2pd is SSE2. _______________________________________________ libav-devel mailing list [email protected] https://lists.libav.org/mailman/listinfo/libav-devel
