On May 12, 2014, at 2:47 PM, Marcin Jurczuk <[email protected]> wrote:
> I will look if this is possible to get such behavior with DMA. Within
> spi1_isr() I just check counter of send packets after BSY is clear.
> Previous solution with TXE flag wasn't working since TXE flag is set but in
> the meantime data tranmission is still in progress.
You need to do the math for your SPI clock speed.
Per my comment earlier in the thread, at 20MHz when TCIF asserts the block is
only going to be putting bits on the wire for another 400ns. You're going to be
doing pretty well to be running code in your interrupt handler in that time, so
you can just poll BSY to determine when the bits have truly stopped (25.3.9 in
the STM32F4 reference, for example).
This is much cheaper than any of the alternatives (especially taking an
interrupt for every byte sent)...
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