> First of all, I am trying to hook on TIM2's IRQ, which should be IRQ 28 on > STM32 F1, according to ST's datasheet and libopencm3's json file. If we take > a look into the objdump in the gist, we see that the vector table starts at > 0x8005000. My ISR seems to be referenced at 0x80050b0 (that's IRQ 44, right?) > and not at 0x8005070 (which is IRQ 28).
The first 16 slots in the vector table are the exceptions; the first peripheral interrupt is vector #16. > Secondly, the vector table references the ISR routine "off by one": my ISR > starts at 0x080051cc and the vector table jumps to 080051cd. The LSB being set tells the processor that the branch target contains Thumb instructions; this is normal. > I am a bit at loss if I am messing things up or if I'm running into a bug, so > I was hoping a post to libopencm3's list could shed some light on this matter. Something else is wrong. Have you turned on the clock to the timer? ------------------------------------------------------------------------------ Dive into the World of Parallel Programming The Go Parallel Website, sponsored by Intel and developed in partnership with Slashdot Media, is your hub for all things parallel software development, from weekly thought leadership blogs to news, videos, case studies, tutorials and more. Take a look and join the conversation now. http://goparallel.sourceforge.net/ _______________________________________________ libopencm3-devel mailing list libopencm3-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/libopencm3-devel
