I once heard a story that cmos machines are always in lpar mode, even if one specifies lpar=no on the iocds. I do not know if it is true, most people run lpar anyway, so the sie part would always be an issue, however I guess that lpar uses more sie assist type features then vm would. Again all model or even microcode patchlevel dependent. Benchmarking on a specific instruction mix is the way to go, but harder to optimize on. I guess the level of sie would also impact on the efficiency of the tlb etc. I remember looking at aix/esa using vector processors under VM v=f vs v=v, which made a hughe difference in performance.
Jan Jaeger. Rob van der Heij wrote: > > > Also, I think there is a misunderstanding about the performance > > counters: they (the ones I ment) are CPU architecture specific and > > neither gcc nor gprof knows about them. They are implemented as "extra" > > fwiw: I never have seen anything like that published (or even mentioned). > Things like the number of clock cycles to execute a specific sequence of > instructions have never been published afaik. The RPP ratings of a model are > determined by running well-defined instruction mix benchmarks (and these > probably are aimed more towards running z/OS than Linux). Most likely > processor design was done to favor common instruction sequences (e.g. > an XC instruction with memory operands may not really fetch the operand > if both addresses are the same). > I would not be surprised if such low level instrumentation were only present > in the hardware simulators they use for processor design. > > The particular model number is not shown by Q CPUID. The processor type > for all S/390 (9672 in your case) and Freeway machines (2064) is the same. > Changes in clock speed, cache size, look aside tables, extra instruction sets > etc tend to mark 'generations' (like G5 vs G6). > > And since you run in a virtual machine you probably care about CP overhead. > A virtual machine runs at native speed under control of SIE until it touches any > of the architecture items marked for interception (at that point the control > program will further complete the virtualisation or deal with the intercept >otherwise). > The smaller the number of SIE intercepts, the closer the virtual machine gets to > native speed. > > Rob
