Sander Smeenk (CistroN Medewerker) wrote:
> Quoting Robert Redelmeier ([EMAIL PROTECTED]):
>
> > > So I changed them, and miracly, the messages have now gone away with my
> > > new memory chips too!! So it *IS* memory related, but not CHIP related,
> > > more timing related...
> >
> > Interesting again. Did you go from CAS2 memory timing to CAS3?
> > The 133 MHz should be more tolerant of faster (CAS2) timings,
> > but that doesn't appear to be the case.
>
> Aye, I did go back to CAS3... I had it set at fastest possible...
>
> > I ran my experiment, and both my sticks of PC100 (ECC & not)
> > give about the same APIC errors. I might try dropping back
> > to CAS3 and see if that makes a difference.
>
> Try it! It might work!
>
> And do you really think you'll notice CAS3 or CAS2 timings?
> I dont :]
The idea behind a "cache" is that you no longer notice the speed of
hte underlying memory layer.
As a rule-of-thumb, Every cache has around 90% hit rate, and 10% miss.
That means your L1 cache will filter out 90% of the memory accesses,
and the L2 cache another 9%. Leaving only 1% of the memory accesses
going to main-memory. So "main memory performance" on average only
influences about 1% of the "memory references" from the CPU core.
In practise you may have an application that runs completly from main
memory, because it is too large tofit the cache. In that case you'd
notice the performance impact directly.
Roger.
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