On Maw, 2006-03-07 at 19:54 -0800, Linus Torvalds wrote: > Close, yes. HOWEVER, it's only really ordered wrt the "innermost" bus. I > don't think PCI bridges are supposed to post PIO writes, but a x86 CPU > basically won't stall for them forever.
The bridges I have will stall forever. You can observe this directly if an IDE device decides to hang the IORDY line on the IDE cable or you crash the GPU on an S3 card. Alan - To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
