On Fri, 5 Mar 1999, Richard Atterer wrote:
> In article <[EMAIL PROTECTED]>
> Russell King - ARM Linux Admin <[EMAIL PROTECTED]> wrote:
>
> > The ARM2 data book says:
> >
> > 'In the case of post-indexed addressing, the write back bit is
> > redundant, since the old base value can be retained by setting the
> > offset to zero.'
> >
> > Hence, when specifing an offset of zero, since no writeback is
> > performed, the result is predictable. However, the question now is,
> > does this apply to the later processors? Have ARM updated their ARM
> > to include this? Did they purposely remove this? Or what?
>
> I don't read the above quote as
>
> "if the offset is 0, no writeback is performed",
>
> rather as
>
> "since 0 is added, it's as if no writeback had taken place".
Agreed. I've now had confirmation from ARM Ltd that LDRT Rm, [Rm] results
in UNPREDICTABLE behaviour. So it appears that binutils is correct and we
should fix the kernel.
> IMHO egcs really ought to produce 'ldrbt r6,[r6,#0]' instead of
> 'ldrbt r6,[r6],#0'.
That would be even worse; it's not a legal instruction. There is no
pre-indexed version of LDRT.
p.
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