>> The strong arm has both the lock bugs and the cache flush bugs. The
>> combination would make SMP suck badly I suspect
>
> What are these bugs and where are they outlined? Also what chips
>are effected (ie SA-110, SA-1100, SA-1110?)? Are the fixes in newer
>steppings?
"Bugs" isn't really the right word -- the chip was deliberately designed to
work like this. They're documented in the StrongARM manual and all SA-1 parts
are affected.
p.
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