On Mon, Oct 11, 1999, Jonathan Kliegman <[EMAIL PROTECTED]> wrote:
>Try using the tulip.c driver instead. It is written to take into
>account the cache coherency (or lack of) on the StrongARM. The 'while
>(transdesc[0] & 0x80000000);' line looks like it will not work unless
>the region of RAM it's reading from is marked uncacheable (which isn't
>likely).
No, he's not using the Linux kernel, but Russel's bootloader, which runs
with data cache disabled, so this should not be an issue. I should put
your hand on the chip's documentation, you probably lack some kind of
initialisation (do you have a PROM providing the hw eth adress for
example ? If you don't you'll probably have to set it up manually from
the driver).
BenH.
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