I there,

I got the very same problem when configuring my sb16 card and I haven't
been able to figure it out yet so could you forward any sol. you get to
me.

Thanks in advance,
Kervin



[EMAIL PROTECTED] wrote:
> 
> Hello,
>         The subject line says it all, I'm having trouble with my sb16 sound
> card. I've read the how2's and have what I think is a proper
> configuration, but the module is not finding the sound card.
>         I'm using isapnptools v1.18. My isapnp.conf file is included below, or,
> at least that part of it dealing with the sound card. I have sound
> compiled directly in to my kernel, 2.2.7, and am inserting the module
> uart401 as instructed in the file
> /usr/src/linux/Documentation/sound/Soundblaster, this module goes in
> fine. I'm then doing
> insmod sb io 0x220 irq 5 dma8 1 dma16 5
>         Here's my isapnp.conf file.
> # $Id: pnpdump.c,v 1.18 1999/02/14 22:47:18 fox Exp $
> # This is free software, see the sources for details.
> # This software has NO WARRANTY, use at your OWN RISK
> #
> # For details of this file format, see isapnp.conf(5)
> #
> # For latest information and FAQ on isapnp and pnpdump see:
> # http://www.roestock.demon.co.uk/isapnptools/
> #
> # Compiler flags: -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR
> #
> # Trying port address 0203
> # Board 1 has serial identifier bb 10 08 50 5d 2b 00 8c 0e
> # Board 2 has serial identifier 3f ae bc 8f b4 30 30 72 56
> # Board 3 has serial identifier 41 24 14 10 bb 94 50 6d 50
> 
> # (DEBUG)
> (READPORT 0x0203)
> (ISOLATE PRESERVE)
> (IDENTIFY *)
> (VERBOSITY 2)
> (CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING
> 
> # Card 1: (serial identifier bb 10 08 50 5d 2b 00 8c 0e)
> # Vendor Id CTL002b, Serial Number 268980317, checksum 0xBB.
> # Version 1.0, Vendor version 2.0
> # ANSI string -->Creative SB16 PnP<--
> #
> # Logical device id CTL0031
> #     Device supports vendor reserved register @ 0x38
> #     Device supports vendor reserved register @ 0x39
> #     Device supports vendor reserved register @ 0x3c
> #     Device supports vendor reserved register @ 0x3e
> #
> # Edit the entries below to uncomment out the configuration required.
> # Note that only the first value of any range is given, this may be
> changed if required
> # Don't forget to uncomment the activate (ACT Y) when happy
> 
> (CONFIGURE CTL002b/268980317 (LD 0
> #     ANSI string -->Audio<--
> 
> # Multiple choice time, choose one only !
> 
> #     Start dependent functions: priority preferred
> #       IRQ 5.
> #             High true, edge sensitive interrupt (by default)
>  (INT 0 (IRQ 5 (MODE +E)))
> #       First DMA channel 1.
> #             8 bit DMA only
> #             Logical device is not a bus master
> #             DMA may execute in count by byte mode
> #             DMA may not execute in count by word mode
> #             DMA channel speed in compatible mode
>  (DMA 0 (CHANNEL 1))
> #       Next DMA channel 5.
> #             16 bit DMA only
> #             Logical device is not a bus master
> #             DMA may not execute in count by byte mode
> #             DMA may execute in count by word mode
> #             DMA channel speed in compatible mode
>  (DMA 1 (CHANNEL 5))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0220
> #             Maximum IO base address 0x0220
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 16
>  (IO 0 (SIZE 16) (BASE 0x0220))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0330
> #             Maximum IO base address 0x0330
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 2
>  (IO 1 (SIZE 2) (BASE 0x0330))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0388
> #             Maximum IO base address 0x0388
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 4
>  (IO 2 (SIZE 4) (BASE 0x0388))
> 
> #       Start dependent functions: priority acceptable
> #       IRQ 5, 7 or 10.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 5 (MODE +E)))
> #       First DMA channel 0, 1 or 3.
> #             8 bit DMA only
> #             Logical device is not a bus master
> #             DMA may execute in count by byte mode
> #             DMA may not execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 0 (CHANNEL 0))
> #       Next DMA channel 5, 6 or 7.
> #             16 bit DMA only
> #             Logical device is not a bus master
> #             DMA may not execute in count by byte mode
> #             DMA may execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 1 (CHANNEL 5))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0220
> #             Maximum IO base address 0x0280
> #             IO base alignment 32 bytes
> #             Number of IO addresses required: 16
> # (IO 0 (SIZE 16) (BASE 0x0220))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0300
> #             Maximum IO base address 0x0330
> #             IO base alignment 48 bytes
> #             Number of IO addresses required: 2
> # (IO 1 (SIZE 2) (BASE 0x0300))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0388
> #             Maximum IO base address 0x0388
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 4
> # (IO 2 (SIZE 4) (BASE 0x0388))
> 
> #       Start dependent functions: priority acceptable
> #       IRQ 5, 7 or 10.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 5 (MODE +E)))
> #       First DMA channel 0, 1 or 3.
> #             8 bit DMA only
> #             Logical device is not a bus master
> #             DMA may execute in count by byte mode
> #             DMA may not execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 0 (CHANNEL 0))
> #       Next DMA channel 5, 6 or 7.
> #             16 bit DMA only
> #             Logical device is not a bus master
> #             DMA may not execute in count by byte mode
> #             DMA may execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 1 (CHANNEL 5))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0220
> #             Maximum IO base address 0x0280
> #             IO base alignment 32 bytes
> #             Number of IO addresses required: 16
> # (IO 0 (SIZE 16) (BASE 0x0220))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0300
> #             Maximum IO base address 0x0330
> #             IO base alignment 48 bytes
> #             Number of IO addresses required: 2
> # (IO 1 (SIZE 2) (BASE 0x0300))
> 
> #       Start dependent functions: priority functional
> #       IRQ 5, 7 or 10.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 5 (MODE +E)))
> #       First DMA channel 0, 1 or 3.
> #             8 bit DMA only
> #             Logical device is not a bus master
> #             DMA may execute in count by byte mode
> #             DMA may not execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 0 (CHANNEL 0))
> #       Next DMA channel 5, 6 or 7.
> #             16 bit DMA only
> #             Logical device is not a bus master
> #             DMA may not execute in count by byte mode
> #             DMA may execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 1 (CHANNEL 5))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0220
> #             Maximum IO base address 0x0280
> #             IO base alignment 32 bytes
> #             Number of IO addresses required: 16
> # (IO 0 (SIZE 16) (BASE 0x0220))
> 
> #       Start dependent functions: priority functional
> #       IRQ 5, 7 or 10.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 5 (MODE +E)))
> #       First DMA channel 0, 1 or 3.
> #             8 bit DMA only
> #             Logical device is not a bus master
> #             DMA may execute in count by byte mode
> #             DMA may not execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 0 (CHANNEL 0))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0220
> #             Maximum IO base address 0x0280
> #             IO base alignment 32 bytes
> #             Number of IO addresses required: 16
> # (IO 0 (SIZE 16) (BASE 0x0220))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0300
> #             Maximum IO base address 0x0330
> #             IO base alignment 48 bytes
> #             Number of IO addresses required: 2
> # (IO 1 (SIZE 2) (BASE 0x0300))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0388
> #             Maximum IO base address 0x0388
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 4
> # (IO 2 (SIZE 4) (BASE 0x0388))
> 
> #       Start dependent functions: priority functional
> #       IRQ 5, 7 or 10.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 5 (MODE +E)))
> #       First DMA channel 0, 1 or 3.
> #             8 bit DMA only
> #             Logical device is not a bus master
> #             DMA may execute in count by byte mode
> #             DMA may not execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 0 (CHANNEL 0))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0220
> #             Maximum IO base address 0x0280
> #             IO base alignment 32 bytes
> #             Number of IO addresses required: 16
> # (IO 0 (SIZE 16) (BASE 0x0220))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0300
> #             Maximum IO base address 0x0330
> #             IO base alignment 48 bytes
> #             Number of IO addresses required: 2
> # (IO 1 (SIZE 2) (BASE 0x0300))
> 
> #       Start dependent functions: priority functional
> #       IRQ 5, 7, 10 or 11.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 5 (MODE +E)))
> #       First DMA channel 0, 1 or 3.
> #             8 bit DMA only
> #             Logical device is not a bus master
> #             DMA may execute in count by byte mode
> #             DMA may not execute in count by word mode
> #             DMA channel speed in compatible mode
> # (DMA 0 (CHANNEL 0))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0220
> #             Maximum IO base address 0x0280
> #             IO base alignment 32 bytes
> #             Number of IO addresses required: 16
> # (IO 0 (SIZE 16) (BASE 0x0220))
> 
> #     End dependent functions
>  (NAME "CTL002b/268980317[0]{Audio               }")
>  (ACT Y)
> ))
> #
> # Logical device id CTL2011
> #     Device supports vendor reserved register @ 0x38
> #     Device supports vendor reserved register @ 0x39
> #     Device supports vendor reserved register @ 0x3c
> #     Device supports vendor reserved register @ 0x3e
> #
> # Edit the entries below to uncomment out the configuration required.
> # Note that only the first value of any range is given, this may be
> changed if required
> # Don't forget to uncomment the activate (ACT Y) when happy
> 
> (CONFIGURE CTL002b/268980317 (LD 1
> #     Compatible device id PNP0600
> #     ANSI string -->IDE<--
> 
> # Multiple choice time, choose one only !
> 
> #     Start dependent functions: priority preferred
> #       IRQ 10.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 10 (MODE +E)))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0168
> #             Maximum IO base address 0x0168
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 8
> # (IO 0 (SIZE 8) (BASE 0x0168))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x036e
> #             Maximum IO base address 0x036e
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 2
> # (IO 1 (SIZE 2) (BASE 0x036e))
> 
> #       Start dependent functions: priority acceptable
> #       IRQ 11.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 11 (MODE +E)))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x01e8
> #             Maximum IO base address 0x01e8
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 8
> # (IO 0 (SIZE 8) (BASE 0x01e8))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x03ee
> #             Maximum IO base address 0x03ee
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 2
> # (IO 1 (SIZE 2) (BASE 0x03ee))
> 
> #       Start dependent functions: priority acceptable
> #       IRQ 10, 11 or 15.
> #             High true, edge sensitive interrupt (by default)
> # (INT 0 (IRQ 10 (MODE +E)))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0180
> #             Maximum IO base address 0x01b8
> #             IO base alignment 8 bytes
> #             Number of IO addresses required: 8
> # (IO 0 (SIZE 8) (BASE 0x0180))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0306
> #             Maximum IO base address 0x033e
> #             IO base alignment 8 bytes
> #             Number of IO addresses required: 2
> # (IO 1 (SIZE 2) (BASE 0x0306))
> 
> #       Start dependent functions: priority functional
> #       IRQ 15.
> #             High true, edge sensitive interrupt (by default)
>  (INT 0 (IRQ 15 (MODE +E)))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0170
> #             Maximum IO base address 0x0170
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 8
>  (IO 0 (SIZE 8) (BASE 0x0170))
> #       Logical device decodes 16 bit IO address lines
> #             Minimum IO base address 0x0376
> #             Maximum IO base address 0x0376
> #             IO base alignment 1 bytes
> #             Number of IO addresses required: 1
>  (IO 1 (SIZE 1) (BASE 0x0376))
> 
> #     End dependent functions
>  (NAME "CTL002b/268980317[1]{IDE                 }")
>  (ACT Y)
> ))
> #
> # Logical device id CTL0051
> #     Device supports vendor reserved register @ 0x3a
> #     Device supports vendor reserved register @ 0x3c
> #     Device supports vendor reserved register @ 0x3e
> #
> # Edit the entries below to uncomment out the configuration required.
> # Note that only the first value of any range is given, this may be
> changed if required
> # Don't forget to uncomment the activate (ACT Y) when happy
> 
> (CONFIGURE CTL002b/268980317 (LD 2
> #     ANSI string -->StereoEnhance<--
> #     Logical device decodes 16 bit IO address lines
> #         Minimum IO base address 0x0100
> #         Maximum IO base address 0x0138
> #         IO base alignment 8 bytes
> #         Number of IO addresses required: 1
> # (IO 0 (SIZE 1) (BASE 0x0100))
>  (NAME "CTL002b/268980317[2]{StereoEnhance       }")
> # (ACT Y)
> ))
> #
> # Logical device id CTL7001
> #     Device supports vendor reserved register @ 0x38
> #     Device supports vendor reserved register @ 0x39
> #     Device supports vendor reserved register @ 0x3c
> #     Device supports vendor reserved register @ 0x3e
> #
> # Edit the entries below to uncomment out the configuration required.
> # Note that only the first value of any range is given, this may be
> changed if required
> # Don't forget to uncomment the activate (ACT Y) when happy
> 
> (CONFIGURE CTL002b/268980317 (LD 3
> #     ANSI string -->Game<--
> #     Logical device decodes 16 bit IO address lines
> #         Minimum IO base address 0x0200
> #         Maximum IO base address 0x0200
> #         IO base alignment 1 bytes
> #         Number of IO addresses required: 8
> # (IO 0 (SIZE 8) (BASE 0x0200))
>  (NAME "CTL002b/268980317[3]{Game                }")
> # (ACT Y)
> ))
> # End tag... Checksum 0x00 (OK)
>         I'd appreciate any help or suggestions.
> Thank you.
> Dave.
> 
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