Hi Herbert, Paes driver is using key expansion algorithm to encrypt and decrypt the plaintext. HW capability of expanding the given plain key is checked based on the provide key length. Here the HW key is the expended version of plain key.
Xilinx AES hardware has a capability to take plain keys/encrypted keys ( these keys are user programmable but for security reasons they are not readable. Only AES accelerator has read access to these keys) stored on chip ( in eFuse/BBRAM etc, ) and used for AES encryption/decryption. Xilinx software is giving the Customer, the flexibility to choose among the different on-chip AES keys. So, we chosen a way to add AES_SEL_HW_KEY option. In Paes driver , The ALG_SET_KEY interface is used to distinguish between HW Vs SW expansion of plain key based on the key_len. How about using same interface to distinguish between the User supplied key Vs HW key selection based on key_len parameter. Thanks kalyani > -----Original Message----- > From: Herbert Xu <[email protected]> > Sent: Monday, June 10, 2019 12:05 PM > To: Kalyani Akula <[email protected]> > Cc: Stephan Mueller <[email protected]>; [email protected]; > [email protected]; [email protected]; linux- > [email protected]; Sarat Chand Savitala <[email protected]> > Subject: Re: [RFC PATCH 4/5] crypto: Adds user space interface for > ALG_SET_KEY_TYPE > > On Mon, Jun 10, 2019 at 05:20:58AM +0000, Kalyani Akula wrote: > > Ping!! > > We already have existing drivers supporting hardware keys. Please check > out how they're handling this. You can grep for paes under drivers/crypto. > > Cheers, > -- > Email: Herbert Xu <[email protected]> Home Page: > http://gondor.apana.org.au/~herbert/ > PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
