Hi, here are some patch against the current ves1x93.c dvb-kernel code.
The patch do following:
- .frequency_stepsize is set to (the correct) 125 (kHz), because both pll�s
using a clock comparision frequency of 125 kHz.
- correct the "pwr" shifting in sp5659_set_tv_freq() from <<5 to <<6,
because the charge pump current bits are bit 6+7 in the register.
- adding a frequence dependent charge pump current value to
sp5659_set_tv_freq() and removing the pwr value from frequency setting calls
Note: The frequence ranges dependent charge pump current value are based on
an Philips comparison measurement between sp5659 and tsa5059, hopefully this
values are correct;)
- raising up the dvb_delays in ves1x93_clr_bit() & ves1x93_init_aquire().
With the old values the dvb_frontend threat doing (here) one or more
"re"tunings, because the ves1893 could not get a reliable lock in the first
shot. Maybe someone can crosstest this to find the best value for the
delays.
Comments are welcome....
Andreas
--- ves1x93.c.org 2004-07-29 22:00:28.162808320 +0200
+++ ves1x93.c 2004-07-29 22:11:17.000000000 +0200
@@ -51,7 +51,7 @@
.type = FE_QPSK,
.frequency_min = 950000,
.frequency_max = 2150000,
- .frequency_stepsize = 250, /* kHz for QPSK frontends */
+ .frequency_stepsize = 125, /* kHz for QPSK frontends */
.frequency_tolerance = 29500,
.symbol_rate_min = 1000000,
.symbol_rate_max = 45000000,
@@ -173,10 +173,20 @@
* set up the downconverter frequency divisor for a
* reference clock comparision frequency of 125 kHz.
*/
-static int sp5659_set_tv_freq (struct i2c_adapter *i2c, u32 freq, u8 pwr)
+static int sp5659_set_tv_freq (struct i2c_adapter *i2c, u32 freq)
{
+
u32 div = (freq + 479500) / 125;
- u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, 0x95, (pwr << 5) | 0x30 };
+
+ if (freq > 2000000)
+ pwr = 3;
+ if ((freq < 1100000)||((freq <= 2000000)&&(freq > 1800000)))
+ pwr = 2;
+ if (((freq >= 1100000)&&(freq <= 1200000))||((freq > 1600000)&&(freq
<=1800000)))
+ pwr = 1;
+ dprintk("%s: charge pump current: %d\n", __FUNCTION__, pwr);
+
+ u8 buf [4] = { (div >> 8) & 0x7f, div & 0xff, 0x95, (pwr << 6) | 0x30 };
return tuner_write (i2c, buf, sizeof(buf));
}
@@ -198,10 +208,10 @@
}
-static int tuner_set_tv_freq (struct i2c_adapter *i2c, u32 freq, u8 pwr)
+static int tuner_set_tv_freq (struct i2c_adapter *i2c, u32 freq)
{
if ((demod_type == DEMOD_VES1893) && (board_type == BOARD_SIEMENS_PCI))
- return sp5659_set_tv_freq (i2c, freq, pwr);
+ return sp5659_set_tv_freq (i2c, freq);
else if (demod_type == DEMOD_VES1993)
return tsa5059_set_tv_freq (i2c, freq);
@@ -255,9 +265,10 @@
static int ves1x93_clr_bit (struct i2c_adapter *i2c)
{
+ dvb_delay(10);
ves1x93_writereg (i2c, 0, init_1x93_tab[0] & 0xfe);
ves1x93_writereg (i2c, 0, init_1x93_tab[0]);
- dvb_delay(5);
+ dvb_delay(50);
return 0;
}
@@ -265,7 +276,7 @@
{
ves1x93_writereg (i2c, 3, 0x00);
ves1x93_writereg (i2c, 3, init_1x93_tab[3]);
- dvb_delay(5);
+ dvb_delay(50);
return 0;
}
@@ -429,7 +440,7 @@
freq -= afc;
- tuner_set_tv_freq (i2c, freq, 0);
+ tuner_set_tv_freq (i2c, freq);
ves1x93_init_aquire (i2c);
}
@@ -528,7 +539,7 @@
{
struct dvb_frontend_parameters *p = arg;
- tuner_set_tv_freq (i2c, p->frequency, 0);
+ tuner_set_tv_freq (i2c, p->frequency);
ves1x93_set_inversion (i2c, p->inversion);
ves1x93_set_fec (i2c, p->u.qpsk.fec_inner);
ves1x93_set_symbolrate (i2c, p->u.qpsk.symbol_rate);
ves1x93_cpc.diff
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