From: Dang Huynh <dang.hu...@mainlining.org> The SoC uses a standard ARM PMU, enable it.
Signed-off-by: Dang Huynh <dang.hu...@mainlining.org> --- arch/arm/boot/dts/unisoc/rda8810pl.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/unisoc/rda8810pl.dtsi b/arch/arm/boot/dts/unisoc/rda8810pl.dtsi index 609359aa91537168435934077e736b216adf50f4..45a2fd3e04cea5aac4fb6b40a6b332ce3eee4f2c 100644 --- a/arch/arm/boot/dts/unisoc/rda8810pl.dtsi +++ b/arch/arm/boot/dts/unisoc/rda8810pl.dtsi @@ -6,6 +6,7 @@ * Copyright (c) 2018 Manivannan Sadhasivam */ +#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> / { @@ -25,6 +26,11 @@ cpu@0 { }; }; + pmu { + compatible = "arm,cortex-a5-pmu"; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; + }; + sram@100000 { compatible = "mmio-sram"; reg = <0x100000 0x10000>; -- 2.51.0