On Wed, Jan 14, 2026 at 02:16:31PM +0000, Tudor Ambarus wrote: > Document the bindings for the Thermal Management Unit (TMU) System > Controller found on Google GS101 SoCs. > > This memory-mapped block exposes the registers required for reading > thermal interrupt status bits. It functions as a syscon provider,
I don't think this is syscon, but the actual TMU. Syscon is various, unrelated system configuration registers. > allowing the main thermal driver to access these registers while > the firmware manages the core thermal logic. > > Signed-off-by: Tudor Ambarus <[email protected]> > --- > .../bindings/mfd/google,gs101-tmu-syscon.yaml | 37 > ++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git > a/Documentation/devicetree/bindings/mfd/google,gs101-tmu-syscon.yaml > b/Documentation/devicetree/bindings/mfd/google,gs101-tmu-syscon.yaml > new file mode 100644 > index > 0000000000000000000000000000000000000000..6a11e43abeaa23ee473be2153478436856277714 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/google,gs101-tmu-syscon.yaml Not MFD either, but soc. > @@ -0,0 +1,37 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mfd/google,gs101-tmu-syscon.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Google GS101 TMU System Controller > + > +maintainers: > + - Tudor Ambarus <[email protected]> > + > +description: | Drop | > + The TMU System Controller provides a memory-mapped interface for > + accessing the interrupt status registers of the Thermal Management > + Unit. It is used as a syscon provider for the main TMU driver. No, it is not a syscon provider. Entire last sentence is incorrect. You must describe here hardware and this hardware does not provide any sort of syscon to any sort of driver. Best regards, Krzysztof
