Add support for handling the TJA11xx PHY IRQ signal.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: Guenter Roeck <[email protected]>
Cc: Heiner Kallweit <[email protected]>
Cc: Jean Delvare <[email protected]>
Cc: [email protected]
---
V2: - Define each bit of the MII_INTEN register and a mask
- Drop IRQ acking from tja11xx_config_intr()
---
drivers/net/phy/nxp-tja11xx.c | 48 +++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c
index b705d0bd798b..b41af609607d 100644
--- a/drivers/net/phy/nxp-tja11xx.c
+++ b/drivers/net/phy/nxp-tja11xx.c
@@ -40,6 +40,29 @@
#define MII_INTSRC_TEMP_ERR BIT(1)
#define MII_INTSRC_UV_ERR BIT(3)
+#define MII_INTEN 22
+#define MII_INTEN_PWON_EN BIT(15)
+#define MII_INTEN_WAKEUP_EN BIT(14)
+#define MII_INTEN_PHY_INIT_FAIL_EN BIT(11)
+#define MII_INTEN_LINK_STATUS_FAIL_EN BIT(10)
+#define MII_INTEN_LINK_STATUS_UP_EN BIT(9)
+#define MII_INTEN_SYM_ERR_EN BIT(8)
+#define MII_INTEN_TRAINING_FAILED_EN BIT(7)
+#define MII_INTEN_SQI_WARNING_EN BIT(6)
+#define MII_INTEN_CONTROL_ERR_EN BIT(5)
+#define MII_INTEN_UV_ERR_EN BIT(3)
+#define MII_INTEN_UV_RECOVERY_EN BIT(2)
+#define MII_INTEN_TEMP_ERR_EN BIT(1)
+#define MII_INTEN_SLEEP_ABORT_EN BIT(0)
+#define MII_INTEN_MASK \
+ (MII_INTEN_PWON_EN | MII_INTEN_WAKEUP_EN | \
+ MII_INTEN_PHY_INIT_FAIL_EN | MII_INTEN_LINK_STATUS_FAIL_EN | \
+ MII_INTEN_LINK_STATUS_UP_EN | MII_INTEN_SYM_ERR_EN | \
+ MII_INTEN_TRAINING_FAILED_EN | MII_INTEN_SQI_WARNING_EN | \
+ MII_INTEN_CONTROL_ERR_EN | MII_INTEN_UV_ERR_EN | \
+ MII_INTEN_UV_RECOVERY_EN | MII_INTEN_TEMP_ERR_EN | \
+ MII_INTEN_SLEEP_ABORT_EN)
+
#define MII_COMMSTAT 23
#define MII_COMMSTAT_LINK_UP BIT(15)
@@ -239,6 +262,25 @@ static int tja11xx_read_status(struct phy_device *phydev)
return 0;
}
+static int tja11xx_config_intr(struct phy_device *phydev)
+{
+ int ret;
+
+ if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
+ ret = phy_write(phydev, MII_INTEN, MII_INTEN_MASK);
+ else
+ ret = phy_write(phydev, MII_INTEN, 0);
+
+ return ret < 0 ? ret : 0;
+}
+
+static int tja11xx_ack_interrupt(struct phy_device *phydev)
+{
+ int ret = phy_read(phydev, MII_INTSRC);
+
+ return ret < 0 ? ret : 0;
+}
+
static int tja11xx_get_sset_count(struct phy_device *phydev)
{
return ARRAY_SIZE(tja11xx_hw_stats);
@@ -366,6 +408,9 @@ static struct phy_driver tja11xx_driver[] = {
.suspend = genphy_suspend,
.resume = genphy_resume,
.set_loopback = genphy_loopback,
+ /* IRQ related */
+ .config_intr = tja11xx_config_intr,
+ .ack_interrupt = tja11xx_ack_interrupt,
/* Statistics */
.get_sset_count = tja11xx_get_sset_count,
.get_strings = tja11xx_get_strings,
@@ -381,6 +426,9 @@ static struct phy_driver tja11xx_driver[] = {
.suspend = genphy_suspend,
.resume = genphy_resume,
.set_loopback = genphy_loopback,
+ /* IRQ related */
+ .config_intr = tja11xx_config_intr,
+ .ack_interrupt = tja11xx_ack_interrupt,
/* Statistics */
.get_sset_count = tja11xx_get_sset_count,
.get_strings = tja11xx_get_strings,
--
2.20.1
