On Wed, Nov 03, 2004, Shachar Shemesh wrote about "Re: Why not using global variables
considered thread-safe ?":
> Oleg Goldshmidt wrote:
>
> >[1] even "primitive" types wider than int, such as long and double;
> > AFAIK Java manuals specifically warn that there is no atomic
> > access to longs and doubles unless you declare them volatile.
> >
> >
> On the 68000 all datatypes are 8, 16 or 32 bits wide. The actual bus,
> however, is only 16 bits wide. Even a simple 32 bit integer (natively
> supported by the CPU) does not guarantee atomicness.
Again, I believe you're mixing in issues which are relevant on SMPs, but not
on a single-CPU machine (which was the topic of this discussion).
The bus might be even 1-bit wide for all I care, but when a single machine
instruction completes (or, on pipelined architechture, which the pipeline is
empty), all the relevant data was already moved on the bus.
When a single-CPU machine does a context switch, it doesn't do it in the
middle of a machine instruction, it does it afterwards. So this is *not* a
problem if 32 bit integers are "natively supported by the CPU" (i.e., there
are machine instructions which operate on them) like you said.
But, like I mentioned, there might be hypothetical machines which don't have
any 32 bit (or 64 bit, or whatever) instructions, and when you write
double d=0.0;
in C, which actually gets done in machine language are two instructions which
separately set the two halfs of the data. In such a case, indeed a context
switch might happen between the two halfs. But, like I said, I don't know of
any modern CPU on which this happens for C's usual types (long, double, etc.).
Anyway, this problem - related to bus widths and cache-line lengths, is
indeed very real on SMP machines (though, if I remember correctly, they
aren't a problem on Pentium SMPs).
--
Nadav Har'El | Wednesday, Nov 3 2004, 19 Heshvan 5765
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