On Mon, May 14, 2007 at 03:20:10PM +0300, Shachar Shemesh wrote: > Muli Ben-Yehuda wrote: > > You are confusing *virtual* memory and *physical* memory. PAE has > > nothing to do with virtual memory and everything to do with physical > > memory.
> I don't think I am. The simple truth of the matter is that it is not > possible to access physical memory directly (at least, not unless you > are in 16 bit real mod, in which case your constraints are much much > harsher than 32 bit, they are more like 20 bit). As such, since a single > linear pointer can only be 32 bit, you cannot simultaneously access more > than 4GB of memory consecutively. Again, you can access 4GB of *virtual* memory consecutively, but each 4K of that virtual memory can address *any* physical address between 0 and 64GB (assuming x86-32-pae). I hope we agree on the above. If not, see the explanation below. A linear pointer has a virtual adderss; that virtual addres is translated by the hardware to a physical frame number + offset. The translation mechanism used (on x86-32) is page tables. Now, the way the page tables work is that the translation for each page of virtual memory is completely independent of the translation of every other page of virtual memory. Therefore, it is possible to have in a single address space, two consecutive page-aligned virtual addresses, lets say 0x1000 and 0x2000 (4K page size on x86-32) such that the first one is translated to physical address 0x0 and the second one is translated to physical address 0x200000000 (8GB), which are obviously more than 4GB apart. Do I need to draw out the PGD, PMD and PTE that would lead to this translation? > Yes, there are plenty tricks you can do. You can resurrect segmented > addresses. You can juggle the physical memory around the virtual > addresses. You can (as Linux does), allocate the different physical > addresses to different contexts. Either way, this is not as simple as > merely accessing the full 64GB as if they were one contiguous memory > (which is what you could do with 64bit platform). Let me rephrase, because I think we're converging (and there I was having such fun...). On a 32-bit platform, a single virtual address space is limited to 4GB in size. But - *any* page in that address space can map *any* physical frame from 0-64GB (assuming PAE). > Which roughly translates to "if you wish". Modern operating systems > have made us used to not touching the segment registers (which is a > good thing), so we are used to only using what Intel provides us in > the "offset" section of the address. You could, however, use the > segments to point to different entries in the PTE, and thus access > two 4GB chunks "simultaneously". A PTE is a single entry (that's what the E stands for...) Not sure what you're trying to say here. > Happy? Joyful. > To save you on the urge to use a magnifying glass to look for more > inaccuracies and things which are not 102.5% correct, I misspelt a > few of the words in this email. Wouldn't want to have a good > nitpicking thread stop.... I'm sorry, the compile is done and I must get back to work now. Nitpickingly yours, Muli ================================================================= To unsubscribe, send mail to [EMAIL PROTECTED] with the word "unsubscribe" in the message body, e.g., run the command echo unsubscribe | mail [EMAIL PROTECTED]
