From: Alex Williamson <[email protected]> The mix_and_match test intentionally submits TX descriptors with an unmapped source IOVA so that the DMA read fails. By default the 82576 re-sends the request after a PCIe completion timeout (datasheet section 8.6.1, GCR.Completion_Timeout_Resend, bit 16, initial value 1b). On real hardware this turns a single fault into a stream of retried reads, keeping PCIe AER and IOMMU error handling busy and interfering with reset recovery.
Clear GCR.Completion_Timeout_Resend during device initialization so a failed read fails once and stays failed. Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Alex Williamson <[email protected]> --- tools/testing/selftests/vfio/lib/drivers/igb/igb.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tools/testing/selftests/vfio/lib/drivers/igb/igb.c b/tools/testing/selftests/vfio/lib/drivers/igb/igb.c index 1848be6cd46c..a7a30660b23e 100644 --- a/tools/testing/selftests/vfio/lib/drivers/igb/igb.c +++ b/tools/testing/selftests/vfio/lib/drivers/igb/igb.c @@ -219,6 +219,18 @@ static void igb_init(struct vfio_pci_device *device) vfio_pci_config_writew(device, PCI_COMMAND, cmd_reg); } + /* + * Disable DMA re-send on PCIe completion timeout (82576 datasheet + * section 8.6.1, GCR.Completion_Timeout_Resend, bit 16). The + * mix_and_match test intentionally submits descriptors targeting + * unmapped IOVAs; with the default (set) value, the device keeps + * retrying the failed read indefinitely, which keeps PCIe AER and + * IOMMU error handling busy and interferes with reset recovery. + */ + ctrl = igb_read32(igb, E1000_GCR); + ctrl &= ~E1000_GCR_CMPL_TMOUT_RESEND; + igb_write32(igb, E1000_GCR, ctrl); + /* Configure PHY internal loopback for testing. */ igb_setup_loopback(igb); -- 2.55.0.795.g602f6c329a-goog
