This patch series introduces support for the AMD I3C master controller, including the device tree binding and driver implementation. --- Changes for V10: clk config: reject timing values exceeding the 18-bit registers (-EINVAL) instead of silently masking. Direct CCC read: clamp length to min(rx_actual, payload.len). Private transfers: report err/actual_len only for issued commands. Handle response code 5 (early T-bit read termination) as a short read; added xi3c_cmd.rx_actual and XI3C_RESP_BYTES_MASK. Report actual_len as min(rx_actual, len) for private reads. Allow zero-length transfers with a NULL buffer. DAA: move PID scratch buffer off-stack to kcalloc(). DAA: drop i3c_master_add_i3c_dev_locked() return check. DAA: replace __free(kfree) with explicit kfree() at a single out: label. DAA: on max devices / no free address, warn and break so already enumerated devices are kept. Document timing constants (MIPI I3C v1.1.1, AMD PG439); fix OD/tCAS constants to ns and XI3C_MAX_DEVS to 128. Replace udelay() with fsleep() in FIFO reset. Use kzalloc_flex() and kmalloc_objs(). Replace min_t() with min() in RX-FIFO drain. Trim verbose comments and drop two MODULE_AUTHOR lines. Use symbolic interrupt macros (GIC_SPI / IRQ_TYPE_LEVEL_HIGH) in the binding example and include arm-gic.h. Added Shubham Patil as Co-developed-by / Signed-off-by on the binding. Trimmed verbose comments and dropped redundant MODULE_AUTHOR lines.
Changes for V9: Drop big-endian MMIO infra patches; do BE FIFO access locally with ioread32be()/iowrite32be() (self-contained, no internals.h). Replace async completion/queue with a synchronous path under the mutex. Rework response handling: add enum i3c_error_code, return -ENODEV/-EIO, set err M2/M0, and propagate err to CCC and private transfers. Switch .priv_xfers to .i3c_xfers; reject non-SDR modes (-EOPNOTSUPP). Rework DAA: incremental addressing, bounded count (-ENOSPC), end-of-enumeration via -ENODEV, zeroed PID buffers. Sleep with usleep_range() in FIFO loops instead of busy-spinning. Use FIELD_PREP() with named masks; convert accessor macros to inlines. Split the timeout macro into XI3C_RESP_TIMEOUT_US and XI3C_XFER_TIMEOUT_MS; add XI3C_POLL_INTERVAL_US. xi3c_clk_cfg(): use NSEC_PER_SEC and named constants, guard underflow, handle I3C_BUS_MODE_MIXED_SLOW. Drop ENTHDR (SDR-only); dispatch CCCs via the I3C_CCC_DIRECT bit. Use const TX buffers and parity8() for the DAA parity bit. Update MODULE_DESCRIPTION, copyright, and Kconfig to AMD_AXI_I3C_MASTER; fix the MAINTAINERS entry. Changes for V8: Included dependent patch "i3c: fix big-endian FIFO transfers" to this series as [3/5]. Resolved conflicts with "i3c: fix big-endian FIFO transfers". Updated description. Used time_left instead of timeout. Used __free(kfree) for xfer to simplify err path in multiple places. Changes for V7: Added i3c controller version details to commit description. Added Reviewed-by tag to binding patch [1/4]. Added big-endian MMIO accessors [2/4]. Added endianness support for i3c_readl_fifo() and i3c_writel_fifo() [3/4]. Updated timeout macro name. Updated xi3c_master_wr_to_tx_fifo() and xi3c_master_rd_from_rx_fifo() to use i3c_writel_fifo() and i3c_readl_fifo(). Changes for V6: Corrected the $id in the YAML file to match the filename and fix the dtschema warning. Removed typecast for xi3c_getrevisionnumber(), xi3c_wrfifolevel(), and xi3c_rdfifolevel(). Replaced dynamic allocation with a static variable for pid_bcr_dcr. Fixed sparse warning in do_daa by typecasting the address parity value to u8. Fixed sparse warning in xi3c_master_bus_init by typecasting the pid value to u64 in info.pid calculation. Changes for V5: Renamed the xlnx,axi-i3c.yaml file into xlnx,axi-i3c-1.0.yaml. Used GENMASK_ULL for PID mask as it's 64bit mask. Changes for V4: Added h/w documentation details. Updated timeout macros. Removed type casting for xi3c_is_resp_available() macro. Used ioread32() and iowrite32() instead of readl() and writel() to keep consistency. Read XI3C_RESET_OFFSET reg before udelay(). Removed xi3c_master_free_xfer() and directly used kfree(). Skipped checking return value of i3c_master_add_i3c_dev_locked(). Used devm_mutex_init() instead of mutex_init(). Changes for V3: Updated commit description. Corrected the order of properties and removed resets property. Added compatible to required list. Added interrupts to example. Resolved merge conflicts. Changes for V2: Updated commit subject and description. Moved allOf to after required. Removed xlnx,num-targets property. Added mixed mode support with clock configuration. Converted smaller functions into inline functions. Used FIELD_GET() in xi3c_get_response(). Updated xi3c_master_rd_from_rx_fifo() to use cmd->rx_buf. Used parity8() for address parity calculation. Added guards for locks. Dropped num_targets and updated xi3c_master_do_daa(). Used __free(kfree) in xi3c_master_send_bdcast_ccc_cmd(). Dropped PM runtime support. Updated xi3c_master_read() and xi3c_master_write() with xi3c_is_resp_available() check. Created separate functions: xi3c_master_init() and xi3c_master_reinit(). Used xi3c_master_init() in bus initialization and xi3c_master_reinit() in error paths. Added DAA structure to xi3c_master structure. --- Manikanta Guntupalli (2): dt-bindings: i3c: Add AMD I3C master controller support i3c: master: Add driver for AMD AXI I3C master controller .../bindings/i3c/xlnx,axi-i3c-1.0.yaml | 58 + MAINTAINERS | 8 + drivers/i3c/master/Kconfig | 15 + drivers/i3c/master/Makefile | 1 + drivers/i3c/master/amd-i3c-master.c | 1124 +++++++++++++++++ 5 files changed, 1206 insertions(+) create mode 100644 Documentation/devicetree/bindings/i3c/xlnx,axi-i3c-1.0.yaml create mode 100644 drivers/i3c/master/amd-i3c-master.c -- 2.49.1
