On Tue, Jun 30, 2009 at 05:48, <[email protected]> wrote:
> --- trunk/arch/blackfin/Kconfig 2009-06-30 09:38:43 UTC (rev 6875)
> +++ trunk/arch/blackfin/Kconfig 2009-06-30 09:48:03 UTC (rev 6876)
> @@ -987,7 +987,7 @@
> config BFIN_L2_DCACHEABLE
> bool "Enable DCACHE for L2 SRAM"
> depends on BFIN_DCACHE
> - depends on BF54x || BF561
> + depends on (BF54x || BF561) && !SMP
> default n
> choice
> prompt "L2 SRAM DCACHE policy"
> @@ -995,11 +995,9 @@
> default BFIN_L2_WRITEBACK
> config BFIN_L2_WRITEBACK
> bool "Write back"
> - depends on !SMP
>
> config BFIN_L2_WRITETHROUGH
> bool "Write through"
> - depends on !SMP
> endchoice
this change is unrelated
> Modified: trunk/arch/blackfin/include/asm/cacheflush.h (6875 => 6876)
>
> (rev 6876)
> @@ -56,9 +56,14 @@
>
> static inline void flush_icache_range(unsigned start, unsigned end)
> {
> +#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK)
> + if (start >= 0x1000 && end <= physical_mem_end)
> + blackfin_dcache_flush_range(start, end);
> #endif
the 0x1000 check is pointless
> +#if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE)
> + if (start >= 0x1000 && end <= physical_mem_end) {
> + blackfin_icache_flush_range(start, end);
> + flush_icache_range_others(start, end);
> + }
same here
-mike
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