Hi Mike,
I had tried put the coreb_trampoline_start code at the beginning of
the .l1.text before
applied this "0x200 offset", but sometimes unexpected fault will assert.
Index: arch/blackfin/kernel/setup.c
===================================================================
--- arch/blackfin/kernel/setup.c (revision 9120)
+++ arch/blackfin/kernel/setup.c (working copy)
@@ -230,6 +230,8 @@
unsigned long data_l1_len = (unsigned long)_data_l1_len;
unsigned long data_b_l1_len = (unsigned long)_data_b_l1_len;
+ blackfin_dma_early_init();
+
/* if necessary, copy L1 text to L1 instruction SRAM */
if (L1_CODE_LENGTH && text_l1_len)
early_dma_memcpy((void *)COREB_L1_CODE_START, _text_l1_lma,
@@ -245,6 +247,7 @@
early_dma_memcpy((void *)COREB_L1_DATA_B_START, _data_b_l1_lma,
data_b_l1_len);
+ early_dma_memcpy_done();
#if ANOMALY_05000491
blackfin_iflush_l1_entry[1] = (unsigned
long)blackfin_icache_flush_range_l1 -
(unsigned long)_stext_l1 + COREB_L1_CODE_START;
Index: arch/blackfin/kernel/vmlinux.lds.S
===================================================================
--- arch/blackfin/kernel/vmlinux.lds.S (revision 9120)
+++ arch/blackfin/kernel/vmlinux.lds.S (working copy)
@@ -176,6 +176,9 @@
{
. = ALIGN(4);
__stext_l1 = .;
+#ifdef CONFIG_SMP
+ *(.l1.text.secondary)
+#endif
*(.l1.text)
#ifdef CONFIG_SCHEDULE_L1
SCHED_TEXT
Index: arch/blackfin/mach-bf561/secondary.S
===================================================================
--- arch/blackfin/mach-bf561/secondary.S (revision 9120)
+++ arch/blackfin/mach-bf561/secondary.S (working copy)
@@ -13,7 +13,7 @@
#include <asm/asm-offsets.h>
#include <asm/trace.h>
-__INIT
+.section .l1.text.secondary
/* Lay the initial stack into the L1 scratch area of Core B */
#define INITIAL_STACK (COREB_L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
On Fri, Sep 3, 2010 at 11:17 PM, Mike Frysinger <[email protected]> wrote:
> On Fri, Sep 3, 2010 at 06:05, <[email protected]> wrote:
>> Revision 9122 Author steven.miao Date 2010-09-03 06:04:58 -0400 (Fri, 03 Sep
>> 2010)
>>
>> Log Message
>>
>> [#6190] bf561 smp: fix sleep mode can not wake up by uart
>>
>> Add offset to avoid .l1.text section relocation overwrite coreb start
>> entry. After coreb wakeup by IPI, it will execute coreb_trampoline_start
>> entry at coreb l1 code area, but l1 iflush patch for ANOMALY_05000491
>> overwrite the coreb_trampoline_start code area, so wakeup fail.
>>
>> Diff
>>
>> Modified: trunk/arch/blackfin/kernel/setup.c (9121 => 9122)
>>
>> /* if necessary, copy L1 text to L1 instruction SRAM */
>> if (L1_CODE_LENGTH && text_l1_len)
>> - early_dma_memcpy((void *)COREB_L1_CODE_START, _text_l1_lma,
>> + early_dma_memcpy((void *)COREB_L1_CODE_START + 0x200,
>> _text_l1_lma,
>> text_l1_len);
>>
>> /* if necessary, copy L1 data to L1 data bank A SRAM */
>> @@ -247,7 +247,7 @@
>>
>> #if ANOMALY_05000491
>> blackfin_iflush_l1_entry[1] = (unsigned
>> long)blackfin_icache_flush_range_l1 -
>> - (unsigned long)_stext_l1 + COREB_L1_CODE_START;
>> + (unsigned long)_stext_l1 + COREB_L1_CODE_START + 0x200;
>> #endif
>
> adding magic constants like 0x200 isnt going to fly. if the space is
> reserved for the trampoline stuff, then place it into L1 sanely by
> using .l1.text section markings.
> -mike
>
Index: arch/blackfin/kernel/setup.c
===================================================================
--- arch/blackfin/kernel/setup.c (revision 9120)
+++ arch/blackfin/kernel/setup.c (working copy)
@@ -230,6 +230,8 @@
unsigned long data_l1_len = (unsigned long)_data_l1_len;
unsigned long data_b_l1_len = (unsigned long)_data_b_l1_len;
+ blackfin_dma_early_init();
+
/* if necessary, copy L1 text to L1 instruction SRAM */
if (L1_CODE_LENGTH && text_l1_len)
early_dma_memcpy((void *)COREB_L1_CODE_START, _text_l1_lma,
@@ -245,6 +247,7 @@
early_dma_memcpy((void *)COREB_L1_DATA_B_START, _data_b_l1_lma,
data_b_l1_len);
+ early_dma_memcpy_done();
#if ANOMALY_05000491
blackfin_iflush_l1_entry[1] = (unsigned long)blackfin_icache_flush_range_l1 -
(unsigned long)_stext_l1 + COREB_L1_CODE_START;
Index: arch/blackfin/kernel/vmlinux.lds.S
===================================================================
--- arch/blackfin/kernel/vmlinux.lds.S (revision 9120)
+++ arch/blackfin/kernel/vmlinux.lds.S (working copy)
@@ -176,6 +176,9 @@
{
. = ALIGN(4);
__stext_l1 = .;
+#ifdef CONFIG_SMP
+ *(.l1.text.secondary)
+#endif
*(.l1.text)
#ifdef CONFIG_SCHEDULE_L1
SCHED_TEXT
Index: arch/blackfin/mach-bf561/secondary.S
===================================================================
--- arch/blackfin/mach-bf561/secondary.S (revision 9120)
+++ arch/blackfin/mach-bf561/secondary.S (working copy)
@@ -13,7 +13,7 @@
#include <asm/asm-offsets.h>
#include <asm/trace.h>
-__INIT
+.section .l1.text.secondary
/* Lay the initial stack into the L1 scratch area of Core B */
#define INITIAL_STACK (COREB_L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12)
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