commit: http://blackfin.uclinux.org/git/?p=linux-kernel;a=commitdiff;h=51cd44cfcc786c62c7bf56db74a52815a8233f5b
branch: http://blackfin.uclinux.org/git/?p=linux-kernel;a=shortlog;h=refs/heads/trunk

anomaly 05000480 on BF537 0.0 0.1 0.2
Multiple Simultaneous Urgent DMA Requests May Cause DMA System Instability
WORKAROUND:
Program the DMA Traffic Control Period to a non-zero value. This forces the DMA block to group accesses together rather than allow
arbitration for each piece of data placed on the internal DMA bus.

Signed-off-by: Steven Miao <[email protected]>
---
 arch/blackfin/kernel/bfin_dma_5xx.c             |    6 ++++++
 arch/blackfin/mach-bf537/include/mach/anomaly.h |    2 ++
 2 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 6ce8dce..38a1093 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -21,6 +21,7 @@
 #include <asm/dma.h>
 #include <asm/uaccess.h>
 #include <asm/early_printk.h>
+#include <mach/cdefBF537.h>
 
 /*
  * To make sure we work around 05000119 - we always check DMA_DONE bit,
@@ -36,6 +37,11 @@ static int __init blackfin_dma_init(void)
 
 	printk(KERN_INFO "Blackfin DMA Controller\n");
 
+
+#if defined(CONFIG_BF537) && ANOMALY_05000480
+	bfin_write_DMA_TC_PER(0x1111);
+#endif
+
 	for (i = 0; i < MAX_DMA_CHANNELS; i++) {
 		atomic_set(&dma_ch[i].chan_status, 0);
 		dma_ch[i].regs = dma_io_base_addr[i];
diff --git a/arch/blackfin/mach-bf537/include/mach/anomaly.h b/arch/blackfin/mach-bf537/include/mach/anomaly.h
index 43df6af..877dcc9 100644
--- a/arch/blackfin/mach-bf537/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf537/include/mach/anomaly.h
@@ -166,6 +166,8 @@
 #define ANOMALY_05000475 (1)
 /* TESTSET Instruction Cannot Be Interrupted */
 #define ANOMALY_05000477 (1)
+/* The data swap between two DMA channels when sereral DMA channel become active */
+#define ANOMALY_05000480 (__SILICON_REVISION__ < 3)
 /* Reads of ITEST_COMMAND and ITEST_DATA Registers Cause Cache Corruption */
 #define ANOMALY_05000481 (1)
 /* IFLUSH sucks at life */
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